Search

Huan Hoang

Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2154, 2827, 2511, 2818
Total Applications
3260
Issued Applications
3044
Pending Applications
110
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13242525 [patent_doc_number] => 10134469 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-20 [patent_title] => Read operation with data latch and signal termination for 1TNR memory array [patent_app_type] => utility [patent_app_number] => 15/637990 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 12084 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15637990 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/637990
Read operation with data latch and signal termination for 1TNR memory array Jun 28, 2017 Issued
Array ( [id] => 13111495 [patent_doc_number] => 10074405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => Apparatus and methods to provide power management for memory devices [patent_app_type] => utility [patent_app_number] => 15/633316 [patent_app_country] => US [patent_app_date] => 2017-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10678 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15633316 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/633316
Apparatus and methods to provide power management for memory devices Jun 25, 2017 Issued
Array ( [id] => 12435801 [patent_doc_number] => 09978449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-22 [patent_title] => Path isolation in a memory device [patent_app_type] => utility [patent_app_number] => 15/633454 [patent_app_country] => US [patent_app_date] => 2017-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5953 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15633454 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/633454
Path isolation in a memory device Jun 25, 2017 Issued
Array ( [id] => 13174049 [patent_doc_number] => 10103148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => NAND string utilizing floating body memory cell [patent_app_type] => utility [patent_app_number] => 15/628931 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 47 [patent_no_of_words] => 16778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15628931 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/628931
NAND string utilizing floating body memory cell Jun 20, 2017 Issued
Array ( [id] => 12122083 [patent_doc_number] => 20180005668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/626595 [patent_app_country] => US [patent_app_date] => 2017-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 31158 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15626595 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/626595
Semiconductor device and method for operating the semiconductor device Jun 18, 2017 Issued
Array ( [id] => 13131605 [patent_doc_number] => 10083740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-25 [patent_title] => Ring oscillator built from SRAM cells interconnected via standard cell-interface [patent_app_type] => utility [patent_app_number] => 15/626133 [patent_app_country] => US [patent_app_date] => 2017-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6017 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15626133 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/626133
Ring oscillator built from SRAM cells interconnected via standard cell-interface Jun 17, 2017 Issued
Array ( [id] => 12181419 [patent_doc_number] => 20180040355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS' [patent_app_type] => utility [patent_app_number] => 15/625651 [patent_app_country] => US [patent_app_date] => 2017-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6597 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15625651 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/625651
Semiconductor devices and semiconductor systems Jun 15, 2017 Issued
Array ( [id] => 13861751 [patent_doc_number] => 10192598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-29 [patent_title] => Memory device comprising programmable command-and-address and/or data interfaces [patent_app_type] => utility [patent_app_number] => 15/623261 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 6272 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623261 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/623261
Memory device comprising programmable command-and-address and/or data interfaces Jun 13, 2017 Issued
Array ( [id] => 15984223 [patent_doc_number] => 10672446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Exchange bias utilization type magnetization rotational element, exchange bias utilization type magnetoresistance effect element, exchange bias utilization type magnetic memory, non-volatile logic circuit, and magnetic neuron element [patent_app_type] => utility [patent_app_number] => 16/079436 [patent_app_country] => US [patent_app_date] => 2017-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 15003 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16079436 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/079436
Exchange bias utilization type magnetization rotational element, exchange bias utilization type magnetoresistance effect element, exchange bias utilization type magnetic memory, non-volatile logic circuit, and magnetic neuron element Jun 8, 2017 Issued
Array ( [id] => 11974693 [patent_doc_number] => 20170278846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING AN ELECTRICALLY FLOATING BODY TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 15/618442 [patent_app_country] => US [patent_app_date] => 2017-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 148 [patent_figures_cnt] => 148 [patent_no_of_words] => 43956 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15618442 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/618442
Semiconductor memory device having an electrically floating body transistor Jun 8, 2017 Issued
Array ( [id] => 11966860 [patent_doc_number] => 20170271013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => '3D FLASH MEMORY DEVICE HAVING DIFFERENT DUMMY WORD LINES AND DATA STORAGE DEVICES INCLUDING SAME' [patent_app_type] => utility [patent_app_number] => 15/609761 [patent_app_country] => US [patent_app_date] => 2017-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15609761 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/609761
3D flash memory device having different dummy word lines and data storage devices including same May 30, 2017 Issued
Array ( [id] => 13597797 [patent_doc_number] => 20180350447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => DATA STORAGE DEVICE WITH REWRITEABLE IN-PLACE MEMORY [patent_app_type] => utility [patent_app_number] => 15/607784 [patent_app_country] => US [patent_app_date] => 2017-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607784 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607784
Data storage device with rewriteable in-place memory May 29, 2017 Issued
Array ( [id] => 12778189 [patent_doc_number] => 20180151231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => METHOD FOR REDUCING A MEMORY OPERATION TIME IN A NON-VOLATILE MEMORY DEVICE AND CORRESPONDING NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/607636 [patent_app_country] => US [patent_app_date] => 2017-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3646 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607636 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607636
Method for reducing a memory operation time in a non-volatile memory device and corresponding non-volatile memory device May 28, 2017 Issued
Array ( [id] => 13893125 [patent_doc_number] => 10199114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Stress detection in a flash memory device [patent_app_type] => utility [patent_app_number] => 15/607422 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7130 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607422 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607422
Stress detection in a flash memory device May 25, 2017 Issued
Array ( [id] => 12573351 [patent_doc_number] => 10020041 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-10 [patent_title] => Self-referenced sense amplifier with precharge [patent_app_type] => utility [patent_app_number] => 15/602856 [patent_app_country] => US [patent_app_date] => 2017-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15602856 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/602856
Self-referenced sense amplifier with precharge May 22, 2017 Issued
Array ( [id] => 14300395 [patent_doc_number] => 10290328 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Memory module with packages of stacked memory chips [patent_app_type] => utility [patent_app_number] => 15/602099 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 13729 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15602099 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/602099
Memory module with packages of stacked memory chips May 21, 2017 Issued
Array ( [id] => 13005583 [patent_doc_number] => 10026462 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-17 [patent_title] => Apparatuses and methods for providing constant DQS-DQ delay in a memory device [patent_app_type] => utility [patent_app_number] => 15/596988 [patent_app_country] => US [patent_app_date] => 2017-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8828 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15596988 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/596988
Apparatuses and methods for providing constant DQS-DQ delay in a memory device May 15, 2017 Issued
Array ( [id] => 15969047 [patent_doc_number] => 20200168275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => WRITING APPARATUS AND METHOD FOR COMPLEMENTARY RESISTIVE SWITCH [patent_app_type] => utility [patent_app_number] => 16/611266 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16611266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/611266
WRITING APPARATUS AND METHOD FOR COMPLEMENTARY RESISTIVE SWITCH May 11, 2017 Abandoned
Array ( [id] => 12738259 [patent_doc_number] => 20180137920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => NON-VOLATILE MEMORY DEVICE INCLUDING DECOUPLING CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/495072 [patent_app_country] => US [patent_app_date] => 2017-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9513 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495072 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/495072
Non-volatile memory device including decoupling circuit Apr 23, 2017 Issued
Array ( [id] => 13214355 [patent_doc_number] => 10121552 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-11-06 [patent_title] => Reducing charge loss in data memory cell adjacent to dummy memory cell [patent_app_type] => utility [patent_app_number] => 15/495178 [patent_app_country] => US [patent_app_date] => 2017-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 41 [patent_no_of_words] => 19339 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495178 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/495178
Reducing charge loss in data memory cell adjacent to dummy memory cell Apr 23, 2017 Issued
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