
Huan Hoang
Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2154, 2827, 2511, 2818 |
| Total Applications | 3260 |
| Issued Applications | 3044 |
| Pending Applications | 110 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11585591
[patent_doc_number] => 09640239
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-02
[patent_title] => 'Sense circuits, semiconductor devices, and related methods for resistance variable memory'
[patent_app_type] => utility
[patent_app_number] => 15/258204
[patent_app_country] => US
[patent_app_date] => 2016-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 13022
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258204
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/258204 | Sense circuits, semiconductor devices, and related methods for resistance variable memory | Sep 6, 2016 | Issued |
Array
(
[id] => 11553461
[patent_doc_number] => 09622337
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-04-11
[patent_title] => 'Anti-sulfurization memory storage device'
[patent_app_type] => utility
[patent_app_number] => 15/257002
[patent_app_country] => US
[patent_app_date] => 2016-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1892
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257002
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/257002 | Anti-sulfurization memory storage device | Sep 5, 2016 | Issued |
Array
(
[id] => 11564456
[patent_doc_number] => 09627049
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-04-18
[patent_title] => 'Reprogram without erase using capacity in multi-level NAND cells'
[patent_app_type] => utility
[patent_app_number] => 15/256494
[patent_app_country] => US
[patent_app_date] => 2016-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 9157
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15256494
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/256494 | Reprogram without erase using capacity in multi-level NAND cells | Sep 1, 2016 | Issued |
Array
(
[id] => 11739977
[patent_doc_number] => 09704568
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-07-11
[patent_title] => 'Reducing SRAM power using strategic data pattern storage'
[patent_app_type] => utility
[patent_app_number] => 15/256396
[patent_app_country] => US
[patent_app_date] => 2016-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4700
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15256396
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/256396 | Reducing SRAM power using strategic data pattern storage | Sep 1, 2016 | Issued |
Array
(
[id] => 11328314
[patent_doc_number] => 20160358924
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-08
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING AN ELECTRICALLY FLOATING BODY TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 15/238343
[patent_app_country] => US
[patent_app_date] => 2016-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 148
[patent_figures_cnt] => 148
[patent_no_of_words] => 43916
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15238343
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/238343 | Semiconductor memory device having an electrically floating body transistor | Aug 15, 2016 | Issued |
Array
(
[id] => 12047126
[patent_doc_number] => 09824735
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-11-21
[patent_title] => 'System and method to generate a random number'
[patent_app_type] => utility
[patent_app_number] => 15/237078
[patent_app_country] => US
[patent_app_date] => 2016-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10389
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15237078
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/237078 | System and method to generate a random number | Aug 14, 2016 | Issued |
Array
(
[id] => 13144483
[patent_doc_number] => 10089577
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-02
[patent_title] => Binary neural networks on progammable integrated circuits
[patent_app_type] => utility
[patent_app_number] => 15/230164
[patent_app_country] => US
[patent_app_date] => 2016-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4737
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15230164
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/230164 | Binary neural networks on progammable integrated circuits | Aug 4, 2016 | Issued |
Array
(
[id] => 13640343
[patent_doc_number] => 09847132
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-12-19
[patent_title] => Ternary content addressable memories
[patent_app_type] => utility
[patent_app_number] => 15/222234
[patent_app_country] => US
[patent_app_date] => 2016-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 15652
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15222234
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/222234 | Ternary content addressable memories | Jul 27, 2016 | Issued |
Array
(
[id] => 11910997
[patent_doc_number] => 09779815
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-03
[patent_title] => 'Method for writing in an EEPROM memory and corresponding device'
[patent_app_type] => utility
[patent_app_number] => 15/221318
[patent_app_country] => US
[patent_app_date] => 2016-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 5071
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15221318
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/221318 | Method for writing in an EEPROM memory and corresponding device | Jul 26, 2016 | Issued |
Array
(
[id] => 11273506
[patent_doc_number] => 20160336053
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-17
[patent_title] => 'MEMORY APPARATUS AND MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/220832
[patent_app_country] => US
[patent_app_date] => 2016-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 11729
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15220832
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/220832 | Memory apparatus and memory device | Jul 26, 2016 | Issued |
Array
(
[id] => 11740000
[patent_doc_number] => 09704592
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-11
[patent_title] => 'Semiconductor storage device and data read method'
[patent_app_type] => utility
[patent_app_number] => 15/221008
[patent_app_country] => US
[patent_app_date] => 2016-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 8157
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15221008
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/221008 | Semiconductor storage device and data read method | Jul 26, 2016 | Issued |
Array
(
[id] => 11125133
[patent_doc_number] => 20160322107
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-03
[patent_title] => '3D FLASH MEMORY DEVICE HAVING DIFFERENT DUMMY WORD LINES AND DATA STORAGE DEVICES INCLUDING SAME'
[patent_app_type] => utility
[patent_app_number] => 15/210628
[patent_app_country] => US
[patent_app_date] => 2016-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 8758
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210628
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/210628 | 3D flash memory device having different dummy word lines and data storage devices including same | Jul 13, 2016 | Issued |
Array
(
[id] => 11117866
[patent_doc_number] => 20160314840
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-27
[patent_title] => 'THREE-DIMENSIONAL NONVOLATILE MEMORY AND RELATED READ METHOD DESIGNED TO REDUCE READ DISTURBANCE'
[patent_app_type] => utility
[patent_app_number] => 15/203826
[patent_app_country] => US
[patent_app_date] => 2016-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 11038
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15203826
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/203826 | Three-dimensional nonvolatile memory and related read method designed to reduce read disturbance | Jul 6, 2016 | Issued |
Array
(
[id] => 11110655
[patent_doc_number] => 20160307626
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-20
[patent_title] => 'APPARATUSES, MEMORIES, AND METHODS FOR ADDRESS DECODING AND SELECTING AN ACCESS LINE'
[patent_app_type] => utility
[patent_app_number] => 15/197539
[patent_app_country] => US
[patent_app_date] => 2016-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5502
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15197539
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/197539 | Apparatuses, memories, and methods for address decoding and selecting an access line | Jun 28, 2016 | Issued |
Array
(
[id] => 11110652
[patent_doc_number] => 20160307622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-20
[patent_title] => 'PROGRAMMING MEMORIES WITH MULTI-LEVEL PASS SIGNAL'
[patent_app_type] => utility
[patent_app_number] => 15/189178
[patent_app_country] => US
[patent_app_date] => 2016-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5048
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15189178
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/189178 | Programming memories with multi-level pass signal | Jun 21, 2016 | Issued |
Array
(
[id] => 11578436
[patent_doc_number] => 09633704
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-25
[patent_title] => 'Read methods of memory devices using bit line sharing'
[patent_app_type] => utility
[patent_app_number] => 15/188461
[patent_app_country] => US
[patent_app_date] => 2016-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5623
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15188461
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/188461 | Read methods of memory devices using bit line sharing | Jun 20, 2016 | Issued |
| 15/185894 | METHOD AND APPARATUS FOR PROGRAMMING WORDLINES OF NAND FLASH MEMORY USING ALTERNATING ENCODING SCHEMES | Jun 16, 2016 | Abandoned |
Array
(
[id] => 12953047
[patent_doc_number] => 09837155
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-12-05
[patent_title] => Dual gate semiconductor memory device with vertical semiconductor column
[patent_app_type] => utility
[patent_app_number] => 15/185388
[patent_app_country] => US
[patent_app_date] => 2016-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 40
[patent_no_of_words] => 15056
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15185388
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/185388 | Dual gate semiconductor memory device with vertical semiconductor column | Jun 16, 2016 | Issued |
Array
(
[id] => 11890731
[patent_doc_number] => 09761294
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-09-12
[patent_title] => 'Thermal-aware memory'
[patent_app_type] => utility
[patent_app_number] => 15/185216
[patent_app_country] => US
[patent_app_date] => 2016-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3373
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15185216
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/185216 | Thermal-aware memory | Jun 16, 2016 | Issued |
Array
(
[id] => 11817682
[patent_doc_number] => 09721640
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-01
[patent_title] => 'Performance of additional refresh operations during self-refresh mode'
[patent_app_type] => utility
[patent_app_number] => 15/184944
[patent_app_country] => US
[patent_app_date] => 2016-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6232
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15184944
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/184944 | Performance of additional refresh operations during self-refresh mode | Jun 15, 2016 | Issued |