Huan Hoang

Array ( [id] => 11345126 [patent_doc_number] => 09529533 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-27 [patent_title] => 'Power grid segmentation for memory arrays' [patent_app_type] => utility [patent_app_number] => 15/177596 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5507 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15177596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12335058 [patent_doc_number] => 09947687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => Memory cells comprising a programmable field effect transistor having a reversibly programmable gate insulator [patent_app_type] => utility [patent_app_number] => 15/176624 [patent_app_country] => US [patent_app_date] => 2016-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 5007 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15176624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11530561 [patent_doc_number] => 20170090539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'POWER-AWARE CPU POWER GRID DESIGN' [patent_app_type] => utility [patent_app_number] => 15/173004 [patent_app_country] => US [patent_app_date] => 2016-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6269 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15173004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11524270 [patent_doc_number] => 09607679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-28 [patent_title] => 'Refresh control device' [patent_app_type] => utility [patent_app_number] => 15/169216 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7022 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169216 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11607789 [patent_doc_number] => 20170125092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/168676 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 15572 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11459779 [patent_doc_number] => 20170053686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-23 [patent_title] => 'MAGNETIC ELEMENT, SKYRMION MEMORY AND ARITHMETIC PROCESSING UNIT' [patent_app_type] => utility [patent_app_number] => 15/168254 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7776 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11897922 [patent_doc_number] => 09767860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'Interconnection for memory electrodes' [patent_app_type] => utility [patent_app_number] => 15/167409 [patent_app_country] => US [patent_app_date] => 2016-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 12903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15167409 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11739988 [patent_doc_number] => 09704578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'NAND string utilizing floating body memory cell' [patent_app_type] => utility [patent_app_number] => 15/161493 [patent_app_country] => US [patent_app_date] => 2016-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 47 [patent_no_of_words] => 17300 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15161493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11057078 [patent_doc_number] => 20160254040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'BOOSTED SUPPLY VOLTAGE GENERATOR AND METHOD THEREFORE' [patent_app_type] => utility [patent_app_number] => 15/149401 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6717 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14891333 [patent_doc_number] => 10425730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Neural network-based loudspeaker modeling with a deconvolution filter [patent_app_type] => utility [patent_app_number] => 15/099433 [patent_app_country] => US [patent_app_date] => 2016-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5728 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15099433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11028458 [patent_doc_number] => 20160225414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'MEMORY MODULE WITH PACKAGES OF STACKED MEMORY CHIPS' [patent_app_type] => utility [patent_app_number] => 15/095288 [patent_app_country] => US [patent_app_date] => 2016-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14790 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15095288 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11918157 [patent_doc_number] => 09786348 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-10 [patent_title] => 'Dynamic adjustment of memory cell digit line capacitance' [patent_app_type] => utility [patent_app_number] => 15/095962 [patent_app_country] => US [patent_app_date] => 2016-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13329 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15095962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11831501 [patent_doc_number] => 09728249 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-08 [patent_title] => 'Wordline shape enhancer' [patent_app_type] => utility [patent_app_number] => 15/093470 [patent_app_country] => US [patent_app_date] => 2016-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4109 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093470 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11659905 [patent_doc_number] => 09672916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'Operation modes for an inverted NAND architecture' [patent_app_type] => utility [patent_app_number] => 15/083224 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 15415 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15083224 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11006915 [patent_doc_number] => 20160203867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-14 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/080930 [patent_app_country] => US [patent_app_date] => 2016-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8662 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15080930 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11551374 [patent_doc_number] => 09620228 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-11 [patent_title] => 'Monotonically increasing persistent counters' [patent_app_type] => utility [patent_app_number] => 15/078416 [patent_app_country] => US [patent_app_date] => 2016-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5207 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15078416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12012497 [patent_doc_number] => 09805816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'Implementation of a one time programmable memory using a MRAM stack design' [patent_app_type] => utility [patent_app_number] => 15/078182 [patent_app_country] => US [patent_app_date] => 2016-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8454 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15078182 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13799049 [patent_doc_number] => 20190013063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => NONVOLATILE SRAM [patent_app_type] => utility [patent_app_number] => 16/079400 [patent_app_country] => US [patent_app_date] => 2016-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16079400 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11466543 [patent_doc_number] => 09583182 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-28 [patent_title] => 'Multi-level memory management' [patent_app_type] => utility [patent_app_number] => 15/077424 [patent_app_country] => US [patent_app_date] => 2016-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13171 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15077424 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12435786 [patent_doc_number] => 09978444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-22 [patent_title] => Sense amplifier enabling scheme [patent_app_type] => utility [patent_app_number] => 15/077636 [patent_app_country] => US [patent_app_date] => 2016-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8369 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15077636 [rel_patent_id] =>[rel_patent_doc_number] =>)