Search

Huan Hoang

Examiner (ID: 18810, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2154, 2827, 2511
Total Applications
3293
Issued Applications
3069
Pending Applications
116
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13640343 [patent_doc_number] => 09847132 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-19 [patent_title] => Ternary content addressable memories [patent_app_type] => utility [patent_app_number] => 15/222234 [patent_app_country] => US [patent_app_date] => 2016-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 15652 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15222234 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/222234
Ternary content addressable memories Jul 27, 2016 Issued
Array ( [id] => 11910997 [patent_doc_number] => 09779815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-03 [patent_title] => 'Method for writing in an EEPROM memory and corresponding device' [patent_app_type] => utility [patent_app_number] => 15/221318 [patent_app_country] => US [patent_app_date] => 2016-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5071 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15221318 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/221318
Method for writing in an EEPROM memory and corresponding device Jul 26, 2016 Issued
Array ( [id] => 11740000 [patent_doc_number] => 09704592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Semiconductor storage device and data read method' [patent_app_type] => utility [patent_app_number] => 15/221008 [patent_app_country] => US [patent_app_date] => 2016-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8157 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15221008 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/221008
Semiconductor storage device and data read method Jul 26, 2016 Issued
Array ( [id] => 11273506 [patent_doc_number] => 20160336053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'MEMORY APPARATUS AND MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/220832 [patent_app_country] => US [patent_app_date] => 2016-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11729 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15220832 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/220832
Memory apparatus and memory device Jul 26, 2016 Issued
Array ( [id] => 11125133 [patent_doc_number] => 20160322107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => '3D FLASH MEMORY DEVICE HAVING DIFFERENT DUMMY WORD LINES AND DATA STORAGE DEVICES INCLUDING SAME' [patent_app_type] => utility [patent_app_number] => 15/210628 [patent_app_country] => US [patent_app_date] => 2016-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8758 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210628 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/210628
3D flash memory device having different dummy word lines and data storage devices including same Jul 13, 2016 Issued
Array ( [id] => 11117866 [patent_doc_number] => 20160314840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'THREE-DIMENSIONAL NONVOLATILE MEMORY AND RELATED READ METHOD DESIGNED TO REDUCE READ DISTURBANCE' [patent_app_type] => utility [patent_app_number] => 15/203826 [patent_app_country] => US [patent_app_date] => 2016-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 11038 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15203826 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/203826
Three-dimensional nonvolatile memory and related read method designed to reduce read disturbance Jul 6, 2016 Issued
Array ( [id] => 11110655 [patent_doc_number] => 20160307626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'APPARATUSES, MEMORIES, AND METHODS FOR ADDRESS DECODING AND SELECTING AN ACCESS LINE' [patent_app_type] => utility [patent_app_number] => 15/197539 [patent_app_country] => US [patent_app_date] => 2016-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5502 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15197539 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/197539
Apparatuses, memories, and methods for address decoding and selecting an access line Jun 28, 2016 Issued
Array ( [id] => 11110652 [patent_doc_number] => 20160307622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'PROGRAMMING MEMORIES WITH MULTI-LEVEL PASS SIGNAL' [patent_app_type] => utility [patent_app_number] => 15/189178 [patent_app_country] => US [patent_app_date] => 2016-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5048 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15189178 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/189178
Programming memories with multi-level pass signal Jun 21, 2016 Issued
Array ( [id] => 11578436 [patent_doc_number] => 09633704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Read methods of memory devices using bit line sharing' [patent_app_type] => utility [patent_app_number] => 15/188461 [patent_app_country] => US [patent_app_date] => 2016-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5623 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15188461 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/188461
Read methods of memory devices using bit line sharing Jun 20, 2016 Issued
Array ( [id] => 11890731 [patent_doc_number] => 09761294 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-12 [patent_title] => 'Thermal-aware memory' [patent_app_type] => utility [patent_app_number] => 15/185216 [patent_app_country] => US [patent_app_date] => 2016-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15185216 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/185216
Thermal-aware memory Jun 16, 2016 Issued
Array ( [id] => 12953047 [patent_doc_number] => 09837155 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-05 [patent_title] => Dual gate semiconductor memory device with vertical semiconductor column [patent_app_type] => utility [patent_app_number] => 15/185388 [patent_app_country] => US [patent_app_date] => 2016-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 40 [patent_no_of_words] => 15056 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15185388 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/185388
Dual gate semiconductor memory device with vertical semiconductor column Jun 16, 2016 Issued
15/185894 METHOD AND APPARATUS FOR PROGRAMMING WORDLINES OF NAND FLASH MEMORY USING ALTERNATING ENCODING SCHEMES Jun 16, 2016 Abandoned
Array ( [id] => 11817682 [patent_doc_number] => 09721640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-01 [patent_title] => 'Performance of additional refresh operations during self-refresh mode' [patent_app_type] => utility [patent_app_number] => 15/184944 [patent_app_country] => US [patent_app_date] => 2016-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6232 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15184944 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/184944
Performance of additional refresh operations during self-refresh mode Jun 15, 2016 Issued
Array ( [id] => 11345126 [patent_doc_number] => 09529533 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-27 [patent_title] => 'Power grid segmentation for memory arrays' [patent_app_type] => utility [patent_app_number] => 15/177596 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5507 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15177596 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/177596
Power grid segmentation for memory arrays Jun 8, 2016 Issued
Array ( [id] => 12335058 [patent_doc_number] => 09947687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => Memory cells comprising a programmable field effect transistor having a reversibly programmable gate insulator [patent_app_type] => utility [patent_app_number] => 15/176624 [patent_app_country] => US [patent_app_date] => 2016-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 5007 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15176624 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/176624
Memory cells comprising a programmable field effect transistor having a reversibly programmable gate insulator Jun 7, 2016 Issued
Array ( [id] => 11530561 [patent_doc_number] => 20170090539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'POWER-AWARE CPU POWER GRID DESIGN' [patent_app_type] => utility [patent_app_number] => 15/173004 [patent_app_country] => US [patent_app_date] => 2016-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6269 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15173004 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/173004
Power-aware CPU power grid design Jun 2, 2016 Issued
Array ( [id] => 11607789 [patent_doc_number] => 20170125092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/168676 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 15572 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168676 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/168676
Nonvolatile semiconductor memory device and memory system May 30, 2016 Issued
Array ( [id] => 11459779 [patent_doc_number] => 20170053686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-23 [patent_title] => 'MAGNETIC ELEMENT, SKYRMION MEMORY AND ARITHMETIC PROCESSING UNIT' [patent_app_type] => utility [patent_app_number] => 15/168254 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7776 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168254 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/168254
Magnetic element, skyrmion memory and arithmetic processing unit May 30, 2016 Issued
Array ( [id] => 11524270 [patent_doc_number] => 09607679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-28 [patent_title] => 'Refresh control device' [patent_app_type] => utility [patent_app_number] => 15/169216 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7022 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169216 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169216
Refresh control device May 30, 2016 Issued
Array ( [id] => 11897922 [patent_doc_number] => 09767860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'Interconnection for memory electrodes' [patent_app_type] => utility [patent_app_number] => 15/167409 [patent_app_country] => US [patent_app_date] => 2016-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 12903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15167409 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/167409
Interconnection for memory electrodes May 26, 2016 Issued
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