Search

Huan Hoang

Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2154, 2827, 2511, 2818
Total Applications
3260
Issued Applications
3044
Pending Applications
110
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13754457 [patent_doc_number] => 10170180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Memory including bi-polar memristor [patent_app_type] => utility [patent_app_number] => 15/547123 [patent_app_country] => US [patent_app_date] => 2015-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4621 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15547123 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/547123
Memory including bi-polar memristor Apr 29, 2015 Issued
Array ( [id] => 10350704 [patent_doc_number] => 20150235709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS, DATA TRANSMISSION DEVICE, AND RECORDING METHOD' [patent_app_type] => utility [patent_app_number] => 14/701052 [patent_app_country] => US [patent_app_date] => 2015-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7918 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14701052 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/701052
Semiconductor memory apparatus, data transmission device, and recording method Apr 29, 2015 Issued
Array ( [id] => 11252792 [patent_doc_number] => 09478303 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-10-25 [patent_title] => 'System and method for measuring data retention in a non-volatile memory' [patent_app_type] => utility [patent_app_number] => 14/699388 [patent_app_country] => US [patent_app_date] => 2015-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 9408 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14699388 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/699388
System and method for measuring data retention in a non-volatile memory Apr 28, 2015 Issued
Array ( [id] => 10610748 [patent_doc_number] => 09330785 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-03 [patent_title] => 'Read operation based aging sensor for static random access memory (SRAM)' [patent_app_type] => utility [patent_app_number] => 14/698844 [patent_app_country] => US [patent_app_date] => 2015-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7368 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14698844 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/698844
Read operation based aging sensor for static random access memory (SRAM) Apr 28, 2015 Issued
Array ( [id] => 11125116 [patent_doc_number] => 20160322090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'LOW POWER MEMORY CELL WITH HIGH SENSING MARGIN' [patent_app_type] => utility [patent_app_number] => 14/698882 [patent_app_country] => US [patent_app_date] => 2015-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 11143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14698882 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/698882
Low power memory cell with high sensing margin Apr 28, 2015 Issued
Array ( [id] => 10817202 [patent_doc_number] => 20160163364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/698510 [patent_app_country] => US [patent_app_date] => 2015-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14698510 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/698510
Semiconductor memory device Apr 27, 2015 Issued
Array ( [id] => 14126563 [patent_doc_number] => 10250154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Data processing device and method for high voltage direct current transmission system [patent_app_type] => utility [patent_app_number] => 14/697439 [patent_app_country] => US [patent_app_date] => 2015-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 10625 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 347 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14697439 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/697439
Data processing device and method for high voltage direct current transmission system Apr 26, 2015 Issued
Array ( [id] => 14126561 [patent_doc_number] => 10250153 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Data processing device for high voltage direct current transmission system and method thereof [patent_app_type] => utility [patent_app_number] => 14/697422 [patent_app_country] => US [patent_app_date] => 2015-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 10834 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14697422 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/697422
Data processing device for high voltage direct current transmission system and method thereof Apr 26, 2015 Issued
Array ( [id] => 10336361 [patent_doc_number] => 20150221366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'METALLIZATION SCHEME FOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/689409 [patent_app_country] => US [patent_app_date] => 2015-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12961 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14689409 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/689409
Metallization scheme for integrated circuit Apr 16, 2015 Issued
Array ( [id] => 10576748 [patent_doc_number] => 09299398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Retention optimized memory device using predictive data inversion' [patent_app_type] => utility [patent_app_number] => 14/683687 [patent_app_country] => US [patent_app_date] => 2015-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 20313 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14683687 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/683687
Retention optimized memory device using predictive data inversion Apr 9, 2015 Issued
Array ( [id] => 11239706 [patent_doc_number] => 09466351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-11 [patent_title] => 'Semiconductor memory device and method for refreshing memory cells' [patent_app_type] => utility [patent_app_number] => 14/681088 [patent_app_country] => US [patent_app_date] => 2015-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14753 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14681088 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/681088
Semiconductor memory device and method for refreshing memory cells Apr 7, 2015 Issued
Array ( [id] => 10178664 [patent_doc_number] => 09208876 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-12-08 [patent_title] => 'Verify pulse delay to improve resistance window' [patent_app_type] => utility [patent_app_number] => 14/663719 [patent_app_country] => US [patent_app_date] => 2015-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 11656 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14663719 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/663719
Verify pulse delay to improve resistance window Mar 19, 2015 Issued
Array ( [id] => 11321434 [patent_doc_number] => 09520180 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-13 [patent_title] => 'System and method for cryogenic hybrid technology computing and memory' [patent_app_type] => utility [patent_app_number] => 14/643078 [patent_app_country] => US [patent_app_date] => 2015-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 50 [patent_no_of_words] => 18590 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14643078 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/643078
System and method for cryogenic hybrid technology computing and memory Mar 9, 2015 Issued
Array ( [id] => 10363920 [patent_doc_number] => 20150248925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-03 [patent_title] => 'ON CHIP CHARACTERIZATION OF TIMING PARAMETERS FOR MEMORY PORTS' [patent_app_type] => utility [patent_app_number] => 14/635204 [patent_app_country] => US [patent_app_date] => 2015-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5920 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14635204 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/635204
On chip characterization of timing parameters for memory ports Mar 1, 2015 Issued
Array ( [id] => 10525835 [patent_doc_number] => 09252357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Magnetoresistive element' [patent_app_type] => utility [patent_app_number] => 14/628932 [patent_app_country] => US [patent_app_date] => 2015-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8363 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14628932 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/628932
Magnetoresistive element Feb 22, 2015 Issued
Array ( [id] => 11042250 [patent_doc_number] => 20160239206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'SEMICONDUCTOR SYSTEM PERFORMING STATUS READ FOR SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/621102 [patent_app_country] => US [patent_app_date] => 2015-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8971 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14621102 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/621102
Semiconductor system performing status read for semiconductor device and operating method thereof Feb 11, 2015 Issued
Array ( [id] => 10253902 [patent_doc_number] => 20150138898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'SHARED TRACKING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 14/608451 [patent_app_country] => US [patent_app_date] => 2015-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14608451 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/608451
Shared tracking circuit Jan 28, 2015 Issued
Array ( [id] => 12497760 [patent_doc_number] => 09997209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-12 [patent_title] => Power-failure protection method and solid state drive [patent_app_type] => utility [patent_app_number] => 15/527538 [patent_app_country] => US [patent_app_date] => 2015-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3086 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15527538 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/527538
Power-failure protection method and solid state drive Jan 7, 2015 Issued
Array ( [id] => 10576776 [patent_doc_number] => 09299426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/589554 [patent_app_country] => US [patent_app_date] => 2015-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 8629 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14589554 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/589554
Nonvolatile semiconductor memory device Jan 4, 2015 Issued
Array ( [id] => 10570026 [patent_doc_number] => 09293202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Path isolation in a memory device' [patent_app_type] => utility [patent_app_number] => 14/579885 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6225 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14579885 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/579885
Path isolation in a memory device Dec 21, 2014 Issued
Menu