Huan Hoang

Array ( [id] => 9712626 [patent_doc_number] => 08837211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Robust initialization with phase change memory cells in both configuration and array' [patent_app_type] => utility [patent_app_number] => 13/869082 [patent_app_country] => US [patent_app_date] => 2013-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 9590 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13869082 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9505277 [patent_doc_number] => 08743600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Processors and systems using cell-refreshed phase-change memory' [patent_app_type] => utility [patent_app_number] => 13/869074 [patent_app_country] => US [patent_app_date] => 2013-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 8165 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13869074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9633438 [patent_doc_number] => 20140211546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'STATIC RANDOM ACCESS MEMORIES (SRAM) WITH READ-PREFERRED CELL STRUCTURES, WRITE DRIVERS, RELATED SYSTEMS, AND METHODS' [patent_app_type] => utility [patent_app_number] => 13/869110 [patent_app_country] => US [patent_app_date] => 2013-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5339 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13869110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9196735 [patent_doc_number] => 20130336050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'Processors and Systems with Read-Qualified-on-Startup Phase-Change Memory' [patent_app_type] => utility [patent_app_number] => 13/869088 [patent_app_country] => US [patent_app_date] => 2013-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9591 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13869088 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9959652 [patent_doc_number] => 09007866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'Retention optimized memory device using predictive data inversion' [patent_app_type] => utility [patent_app_number] => 13/868884 [patent_app_country] => US [patent_app_date] => 2013-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 20303 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13868884 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10508222 [patent_doc_number] => 09236098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-12 [patent_title] => 'Semiconductor device having transistor and semiconductor memory device using the same' [patent_app_type] => utility [patent_app_number] => 13/843397 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7009 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13843397 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10508222 [patent_doc_number] => 09236098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-12 [patent_title] => 'Semiconductor device having transistor and semiconductor memory device using the same' [patent_app_type] => utility [patent_app_number] => 13/843397 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7009 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13843397 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10508222 [patent_doc_number] => 09236098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-12 [patent_title] => 'Semiconductor device having transistor and semiconductor memory device using the same' [patent_app_type] => utility [patent_app_number] => 13/843397 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7009 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13843397 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10508222 [patent_doc_number] => 09236098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-12 [patent_title] => 'Semiconductor device having transistor and semiconductor memory device using the same' [patent_app_type] => utility [patent_app_number] => 13/843397 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7009 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13843397 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11057098 [patent_doc_number] => 20160254060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'High Speed And Low Power Sense Amplifier' [patent_app_type] => utility [patent_app_number] => 14/772734 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2900 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14772734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9733335 [patent_doc_number] => 20140269044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'METHODS AND APPARATUSES FOR CONTROLLING MEMORY WRITE SEQUENCES' [patent_app_type] => utility [patent_app_number] => 13/799312 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8578 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13799312 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9329291 [patent_doc_number] => 20140056073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/799328 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8638 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13799328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9559640 [patent_doc_number] => 20140177352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'SHARED TRACKING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/799402 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7183 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13799402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9890307 [patent_doc_number] => 08976574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Process corner sensor for bit-cells' [patent_app_type] => utility [patent_app_number] => 13/799408 [patent_app_country] => US [patent_app_date] => 2013-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4583 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13799408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9712654 [patent_doc_number] => 08837239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Latency control circuit and semiconductor device including the circuit' [patent_app_type] => utility [patent_app_number] => 13/797574 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6024 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13797574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9040003 [patent_doc_number] => 20130242641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/795582 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13793 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13795582 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9764097 [patent_doc_number] => 08848433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 13/795620 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 54 [patent_no_of_words] => 19036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13795620 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9779694 [patent_doc_number] => 08854908 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-07 [patent_title] => 'System and method for memory access in server communications' [patent_app_type] => utility [patent_app_number] => 13/797814 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8645 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13797814 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10846074 [patent_doc_number] => 08873264 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-28 [patent_title] => 'Data forwarding circuits and methods for memory devices with write latency' [patent_app_type] => utility [patent_app_number] => 13/795134 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 6216 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13795134 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9196743 [patent_doc_number] => 20130336058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND RELATED METHOD OF OPERATION' [patent_app_type] => utility [patent_app_number] => 13/795750 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9585 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13795750 [rel_patent_id] =>[rel_patent_doc_number] =>)