Search

Huan Hoang

Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2154, 2827, 2511, 2818
Total Applications
3260
Issued Applications
3044
Pending Applications
110
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8882569 [patent_doc_number] => 20130155753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'METHOD FOR IMPLEMENTING SPARE LOGIC OF SEMICONDUCTOR MEMORY APPARATUS AND STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/585455 [patent_app_country] => US [patent_app_date] => 2012-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6842 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13585455 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/585455
METHOD FOR IMPLEMENTING SPARE LOGIC OF SEMICONDUCTOR MEMORY APPARATUS AND STRUCTURE THEREOF Aug 13, 2012 Abandoned
Array ( [id] => 9833199 [patent_doc_number] => 08942025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Variable resistance nonvolatile memory element writing method' [patent_app_type] => utility [patent_app_number] => 13/809175 [patent_app_country] => US [patent_app_date] => 2012-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 50 [patent_no_of_words] => 14769 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13809175 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/809175
Variable resistance nonvolatile memory element writing method Aug 8, 2012 Issued
Array ( [id] => 8488285 [patent_doc_number] => 20120287692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'READ THRESHOLD SETTING BASED ON TEMPERATURE INTEGRAL' [patent_app_type] => utility [patent_app_number] => 13/555745 [patent_app_country] => US [patent_app_date] => 2012-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8329 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13555745 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/555745
Read threshold setting based on temperature integral Jul 22, 2012 Issued
Array ( [id] => 9415235 [patent_doc_number] => 08699281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality' [patent_app_type] => utility [patent_app_number] => 13/550783 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7031 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13550783 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/550783
Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality Jul 16, 2012 Issued
Array ( [id] => 8475811 [patent_doc_number] => 20120275218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'SPIN TORQUE TRANSFER CELL STRUCTURE UTILIZING FIELD-INDUCED ANTIFERROMAGNETIC OR FERROMAGNETIC COUPLING' [patent_app_type] => utility [patent_app_number] => 13/544670 [patent_app_country] => US [patent_app_date] => 2012-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6101 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13544670 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/544670
Spin torque transfer cell structure utilizing field-induced antiferromagnetic or ferromagnetic coupling Jul 8, 2012 Issued
Array ( [id] => 8644129 [patent_doc_number] => 08369123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Stacked memory module and system' [patent_app_type] => utility [patent_app_number] => 13/535363 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 43 [patent_no_of_words] => 20939 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535363 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/535363
Stacked memory module and system Jun 27, 2012 Issued
Array ( [id] => 9141866 [patent_doc_number] => 08582339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'System including memory stacks' [patent_app_type] => utility [patent_app_number] => 13/536093 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 28 [patent_no_of_words] => 14432 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13536093 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/536093
System including memory stacks Jun 27, 2012 Issued
Array ( [id] => 8521251 [patent_doc_number] => 20120320659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'RESISTANCE-CHANGE MEMORY DEVICE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/489916 [patent_app_country] => US [patent_app_date] => 2012-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10410 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13489916 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/489916
Resistance-change memory device and method of operating the same Jun 5, 2012 Issued
Array ( [id] => 9577073 [patent_doc_number] => 08767500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Buffer circuit and word line driver using the same' [patent_app_type] => utility [patent_app_number] => 13/489562 [patent_app_country] => US [patent_app_date] => 2012-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3176 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13489562 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/489562
Buffer circuit and word line driver using the same Jun 5, 2012 Issued
Array ( [id] => 9180169 [patent_doc_number] => 20130322154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'SENSE AMPLIFIER CIRCUITRY FOR RESISTIVE TYPE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/488432 [patent_app_country] => US [patent_app_date] => 2012-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12827 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13488432 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/488432
Sense amplifier circuitry for resistive type memory Jun 3, 2012 Issued
Array ( [id] => 9324901 [patent_doc_number] => 08659931 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-25 [patent_title] => 'Erase and soft program within the erase operation for a high speed resistive switching memory operation with controlled erased states' [patent_app_type] => utility [patent_app_number] => 13/488392 [patent_app_country] => US [patent_app_date] => 2012-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8769 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13488392 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/488392
Erase and soft program within the erase operation for a high speed resistive switching memory operation with controlled erased states Jun 3, 2012 Issued
Array ( [id] => 9180196 [patent_doc_number] => 20130322181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'METHOD, APPARATUS, AND MANUFACTURE FOR FLASH MEMORY ADAPTIVE ALGORITHM' [patent_app_type] => utility [patent_app_number] => 13/486972 [patent_app_country] => US [patent_app_date] => 2012-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5737 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13486972 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/486972
Method, apparatus, and manufacture for flash memory adaptive algorithm May 31, 2012 Issued
Array ( [id] => 10839599 [patent_doc_number] => 08867284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-21 [patent_title] => 'Semiconductor element and operating method thereof' [patent_app_type] => utility [patent_app_number] => 13/486010 [patent_app_country] => US [patent_app_date] => 2012-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2220 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13486010 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/486010
Semiconductor element and operating method thereof May 31, 2012 Issued
Array ( [id] => 9101129 [patent_doc_number] => 08565018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Reducing effects of erase disturb in a memory device' [patent_app_type] => utility [patent_app_number] => 13/486028 [patent_app_country] => US [patent_app_date] => 2012-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 6368 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13486028 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/486028
Reducing effects of erase disturb in a memory device May 31, 2012 Issued
Array ( [id] => 9577070 [patent_doc_number] => 08767497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Semiconductor device performing self refresh operation' [patent_app_type] => utility [patent_app_number] => 13/486706 [patent_app_country] => US [patent_app_date] => 2012-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 19295 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13486706 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/486706
Semiconductor device performing self refresh operation May 31, 2012 Issued
Array ( [id] => 8515075 [patent_doc_number] => 20120314483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/485722 [patent_app_country] => US [patent_app_date] => 2012-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 20078 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13485722 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/485722
SEMICONDUCTOR DEVICE May 30, 2012 Abandoned
Array ( [id] => 9664062 [patent_doc_number] => 08811060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Non-volatile memory crosspoint repair' [patent_app_type] => utility [patent_app_number] => 13/485748 [patent_app_country] => US [patent_app_date] => 2012-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8694 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13485748 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/485748
Non-volatile memory crosspoint repair May 30, 2012 Issued
Array ( [id] => 8415862 [patent_doc_number] => 20120243362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'ADVANCED DETECTION OF MEMORY DEVICE REMOVAL, AND METHODS, DEVICES AND CONNECTORS' [patent_app_type] => utility [patent_app_number] => 13/482743 [patent_app_country] => US [patent_app_date] => 2012-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4736 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13482743 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/482743
Advanced detection of memory device removal, and methods, devices and connectors May 28, 2012 Issued
Array ( [id] => 8372388 [patent_doc_number] => 20120221779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'PROGRAMMING MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/464531 [patent_app_country] => US [patent_app_date] => 2012-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4033 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13464531 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/464531
Programming memory devices May 3, 2012 Issued
Array ( [id] => 8443331 [patent_doc_number] => 20120259948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-11 [patent_title] => 'ASYNCHRONOUS DISTRIBUTED OBJECT UPLOADING FOR REPLICATED CONTENT ADDRESSABLE STORAGE CLUSTERS' [patent_app_type] => utility [patent_app_number] => 13/444247 [patent_app_country] => US [patent_app_date] => 2012-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8359 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13444247 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/444247
Asynchronous distributed object uploading for replicated content addressable storage clusters Apr 10, 2012 Issued
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