Huan Hoang

Array ( [id] => 8459436 [patent_doc_number] => 08295111 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-23 [patent_title] => 'Semiconductor memory device comprising sensing circuits with adjacent column selectors' [patent_app_type] => utility [patent_app_number] => 12/894246 [patent_app_country] => US [patent_app_date] => 2010-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7568 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12894246 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8052395 [patent_doc_number] => 20120075935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'VOLTAGE DISCHARGE CIRCUITS AND METHODS' [patent_app_type] => utility [patent_app_number] => 12/893400 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3425 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20120075935.pdf [firstpage_image] =>[orig_patent_app_number] => 12893400 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7493899 [patent_doc_number] => 08031531 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-10-04 [patent_title] => 'Incremental memory refresh' [patent_app_type] => utility [patent_app_number] => 12/893542 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 11495 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/031/08031531.pdf [firstpage_image] =>[orig_patent_app_number] => 12893542 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6157368 [patent_doc_number] => 20110157991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'EEPROM DEVICE' [patent_app_type] => utility [patent_app_number] => 12/893650 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3192 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20110157991.pdf [firstpage_image] =>[orig_patent_app_number] => 12893650 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7797128 [patent_doc_number] => 08125838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-28 [patent_title] => 'System in package integrated circuit with self-generating reference voltage' [patent_app_type] => utility [patent_app_number] => 12/892934 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2114 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/125/08125838.pdf [firstpage_image] =>[orig_patent_app_number] => 12892934 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8307162 [patent_doc_number] => 08228713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'SRAM having wordline up-level voltage adjustable to assist bitcell stability and design structure for same' [patent_app_type] => utility [patent_app_number] => 12/892160 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5330 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12892160 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8376724 [patent_doc_number] => 08259528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Semiconductor memory device and a method of controlling a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/892462 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7089 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12892462 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8387473 [patent_doc_number] => 08264874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/890856 [patent_app_country] => US [patent_app_date] => 2010-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 59 [patent_no_of_words] => 16549 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12890856 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6163444 [patent_doc_number] => 20110194342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'NONVOLATILE MEMORY CIRCUIT USING SPIN MOS TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 12/889881 [patent_app_country] => US [patent_app_date] => 2010-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10812 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20110194342.pdf [firstpage_image] =>[orig_patent_app_number] => 12889881 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6123390 [patent_doc_number] => 20110085366 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'DEVICE' [patent_app_type] => utility [patent_app_number] => 12/889976 [patent_app_country] => US [patent_app_date] => 2010-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4822 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20110085366.pdf [firstpage_image] =>[orig_patent_app_number] => 12889976 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7730128 [patent_doc_number] => 20120014171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'SCHMITT TRIGGER-BASED FINFET SRAM CELL' [patent_app_type] => utility [patent_app_number] => 12/876582 [patent_app_country] => US [patent_app_date] => 2010-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4374 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20120014171.pdf [firstpage_image] =>[orig_patent_app_number] => 12876582 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6078124 [patent_doc_number] => 20110141793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/876746 [patent_app_country] => US [patent_app_date] => 2010-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6775 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20110141793.pdf [firstpage_image] =>[orig_patent_app_number] => 12876746 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8556685 [patent_doc_number] => 08331163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Latch based memory device' [patent_app_type] => utility [patent_app_number] => 12/876560 [patent_app_country] => US [patent_app_date] => 2010-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11237 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12876560 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7806446 [patent_doc_number] => 20120057399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-08 [patent_title] => 'ASYMMETRIC VIRTUAL-GROUND SINGLE-ENDED SRAM AND SYSTEM THEREOF' [patent_app_type] => utility [patent_app_number] => 12/876682 [patent_app_country] => US [patent_app_date] => 2010-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3005 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20120057399.pdf [firstpage_image] =>[orig_patent_app_number] => 12876682 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7802304 [patent_doc_number] => 08130580 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-03-06 [patent_title] => 'Low power sense amplifier for reading memory' [patent_app_type] => utility [patent_app_number] => 12/876064 [patent_app_country] => US [patent_app_date] => 2010-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1769 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/130/08130580.pdf [firstpage_image] =>[orig_patent_app_number] => 12876064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6147848 [patent_doc_number] => 20110019478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'SENSING OF MEMORY CELLS IN NAND FLASH' [patent_app_type] => utility [patent_app_number] => 12/860338 [patent_app_country] => US [patent_app_date] => 2010-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20110019478.pdf [firstpage_image] =>[orig_patent_app_number] => 12860338 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8411412 [patent_doc_number] => 08274814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-25 [patent_title] => 'Semiconductor device including storage device and method for driving the same' [patent_app_type] => utility [patent_app_number] => 12/859864 [patent_app_country] => US [patent_app_date] => 2010-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 30 [patent_no_of_words] => 15112 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12859864 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6160442 [patent_doc_number] => 20110192827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'Method Of Monitoring Machine Condition' [patent_app_type] => utility [patent_app_number] => 12/859753 [patent_app_country] => US [patent_app_date] => 2010-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3500 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20110192827.pdf [firstpage_image] =>[orig_patent_app_number] => 12859753 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7762126 [patent_doc_number] => 20120031885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'POWER BOOSTER FOR METAL DISINTEGRATOR' [patent_app_type] => utility [patent_app_number] => 12/851568 [patent_app_country] => US [patent_app_date] => 2010-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2585 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20120031885.pdf [firstpage_image] =>[orig_patent_app_number] => 12851568 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8307202 [patent_doc_number] => 08228745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'Two stage voltage level shifting' [patent_app_type] => utility [patent_app_number] => 12/805147 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6508 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12805147 [rel_patent_id] =>[rel_patent_doc_number] =>)