Search

Huan Hoang

Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2154, 2827, 2511, 2818
Total Applications
3260
Issued Applications
3044
Pending Applications
110
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8790647 [patent_doc_number] => 20130107616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'MAGNETORESISTIVE EFFECT ELEMENT AND RANDOM ACCESS MEMORY USING SAME' [patent_app_type] => utility [patent_app_number] => 13/808967 [patent_app_country] => US [patent_app_date] => 2010-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5049 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13808967 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/808967
MAGNETORESISTIVE EFFECT ELEMENT AND RANDOM ACCESS MEMORY USING SAME Jul 8, 2010 Abandoned
Array ( [id] => 7719048 [patent_doc_number] => 20120008387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'METHOD OF TWICE PROGRAMMING A NON-VOLATILE FLASH MEMORY WITH A SEQUENCE' [patent_app_type] => utility [patent_app_number] => 12/831612 [patent_app_country] => US [patent_app_date] => 2010-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3929 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20120008387.pdf [firstpage_image] =>[orig_patent_app_number] => 12831612 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/831612
Method of twice programming a non-volatile flash memory with a sequence Jul 6, 2010 Issued
Array ( [id] => 6533947 [patent_doc_number] => 20100270633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/830954 [patent_app_country] => US [patent_app_date] => 2010-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11389 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20100270633.pdf [firstpage_image] =>[orig_patent_app_number] => 12830954 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/830954
Nonvolatile memory device Jul 5, 2010 Issued
Array ( [id] => 8726907 [patent_doc_number] => 08406041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Scalable magnetic memory cell with reduced write current' [patent_app_type] => utility [patent_app_number] => 12/830580 [patent_app_country] => US [patent_app_date] => 2010-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5782 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12830580 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/830580
Scalable magnetic memory cell with reduced write current Jul 5, 2010 Issued
Array ( [id] => 8809107 [patent_doc_number] => 08446767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Memories and their formation' [patent_app_type] => utility [patent_app_number] => 12/829860 [patent_app_country] => US [patent_app_date] => 2010-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 17216 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12829860 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/829860
Memories and their formation Jul 1, 2010 Issued
Array ( [id] => 7708831 [patent_doc_number] => 20120002461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'NON-VOLATILE MEMORY WITH OVONIC THRESHOLD SWITCH AND RESISTIVE MEMORY ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/830086 [patent_app_country] => US [patent_app_date] => 2010-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12830086 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/830086
NON-VOLATILE MEMORY WITH OVONIC THRESHOLD SWITCH AND RESISTIVE MEMORY ELEMENT Jul 1, 2010 Abandoned
Array ( [id] => 8626055 [patent_doc_number] => 08358554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Semiconductor memory device performing partial self refresh and memory system including same' [patent_app_type] => utility [patent_app_number] => 12/829448 [patent_app_country] => US [patent_app_date] => 2010-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6885 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12829448 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/829448
Semiconductor memory device performing partial self refresh and memory system including same Jul 1, 2010 Issued
Array ( [id] => 8654277 [patent_doc_number] => 08374034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Nonvolatile memory device and read method thereof' [patent_app_type] => utility [patent_app_number] => 12/826584 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3038 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826584 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/826584
Nonvolatile memory device and read method thereof Jun 28, 2010 Issued
Array ( [id] => 6494673 [patent_doc_number] => 20100259965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-14 [patent_title] => 'HIGH SPEED OTP SENSING SCHEME' [patent_app_type] => utility [patent_app_number] => 12/822332 [patent_app_country] => US [patent_app_date] => 2010-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 18751 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20100259965.pdf [firstpage_image] =>[orig_patent_app_number] => 12822332 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/822332
High speed OTP sensing scheme Jun 23, 2010 Issued
Array ( [id] => 6267293 [patent_doc_number] => 20100254180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'SYSTEM FOR BITCELL AND COLUMN TESTING IN SRAM' [patent_app_type] => utility [patent_app_number] => 12/819393 [patent_app_country] => US [patent_app_date] => 2010-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3836 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20100254180.pdf [firstpage_image] =>[orig_patent_app_number] => 12819393 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/819393
System for bitcell and column testing in SRAM Jun 20, 2010 Issued
Array ( [id] => 4611897 [patent_doc_number] => 07995395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'Charge loss compensation during programming of a memory device' [patent_app_type] => utility [patent_app_number] => 12/795764 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4432 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/995/07995395.pdf [firstpage_image] =>[orig_patent_app_number] => 12795764 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/795764
Charge loss compensation during programming of a memory device Jun 7, 2010 Issued
Array ( [id] => 4467770 [patent_doc_number] => 07936579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Semiconductor memory device and semiconductor device group' [patent_app_type] => utility [patent_app_number] => 12/792115 [patent_app_country] => US [patent_app_date] => 2010-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 39 [patent_no_of_words] => 7064 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/936/07936579.pdf [firstpage_image] =>[orig_patent_app_number] => 12792115 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792115
Semiconductor memory device and semiconductor device group Jun 1, 2010 Issued
Array ( [id] => 6413203 [patent_doc_number] => 20100306459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'Memory Controllers' [patent_app_type] => utility [patent_app_number] => 12/786776 [patent_app_country] => US [patent_app_date] => 2010-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3292 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0306/20100306459.pdf [firstpage_image] =>[orig_patent_app_number] => 12786776 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/786776
Memory controllers May 24, 2010 Issued
Array ( [id] => 6628001 [patent_doc_number] => 20100226177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-09 [patent_title] => 'NON-VOLATILE MULTILEVEL MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 12/785201 [patent_app_country] => US [patent_app_date] => 2010-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9090 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20100226177.pdf [firstpage_image] =>[orig_patent_app_number] => 12785201 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/785201
Non-volatile multilevel memory cells May 20, 2010 Issued
Array ( [id] => 8579272 [patent_doc_number] => 08345492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Memory controller for detecting read latency, memory system and test system having the same' [patent_app_type] => utility [patent_app_number] => 12/781846 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8229 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12781846 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/781846
Memory controller for detecting read latency, memory system and test system having the same May 17, 2010 Issued
Array ( [id] => 8561048 [patent_doc_number] => 08335115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-18 [patent_title] => 'Semiconductor memory module and semiconductor memory system having termination resistor units' [patent_app_type] => utility [patent_app_number] => 12/781936 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 15450 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12781936 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/781936
Semiconductor memory module and semiconductor memory system having termination resistor units May 17, 2010 Issued
Array ( [id] => 8556671 [patent_doc_number] => 08331149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => '3D nonvolatile memory device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/781926 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 4746 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12781926 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/781926
3D nonvolatile memory device and method for fabricating the same May 17, 2010 Issued
Array ( [id] => 7507178 [patent_doc_number] => 08036041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Method for non-volatile memory with background data latch caching during read operations' [patent_app_type] => utility [patent_app_number] => 12/782503 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 59 [patent_no_of_words] => 30360 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/036/08036041.pdf [firstpage_image] =>[orig_patent_app_number] => 12782503 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/782503
Method for non-volatile memory with background data latch caching during read operations May 17, 2010 Issued
Array ( [id] => 8529229 [patent_doc_number] => 08305811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Flash memory device and method of reading data' [patent_app_type] => utility [patent_app_number] => 12/780982 [patent_app_country] => US [patent_app_date] => 2010-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4847 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12780982 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/780982
Flash memory device and method of reading data May 16, 2010 Issued
Array ( [id] => 7585559 [patent_doc_number] => 20110280069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'ITERATIVE DEMODULATION AND DECODING FOR MULTI-PAGE MEMORY ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 12/781780 [patent_app_country] => US [patent_app_date] => 2010-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9387 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20110280069.pdf [firstpage_image] =>[orig_patent_app_number] => 12781780 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/781780
Iterative demodulation and decoding for multi-page memory architecture May 16, 2010 Issued
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