Search

Huan Hoang

Examiner (ID: 18810, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2154, 2827, 2511
Total Applications
3293
Issued Applications
3069
Pending Applications
116
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19116128 [patent_doc_number] => 20240127878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => METHODS FOR ROW HAMMER MITIGATION AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAME [patent_app_type] => utility [patent_app_number] => 18/384682 [patent_app_country] => US [patent_app_date] => 2023-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384682 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384682
Methods for row hammer mitigation and memory devices and systems employing the same Oct 26, 2023 Issued
Array ( [id] => 20258812 [patent_doc_number] => 12431173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Memory package performing training operation using address-delay mapping and memory system including the same [patent_app_type] => utility [patent_app_number] => 18/494258 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 8026 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494258 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/494258
Memory package performing training operation using address-delay mapping and memory system including the same Oct 24, 2023 Issued
Array ( [id] => 18958664 [patent_doc_number] => 20240046991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => NON-VOLATILE MEMORY DEVICE AND PROGRAMMING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/491966 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18491966 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/491966
Non-volatile memory device and programming method thereof Oct 22, 2023 Issued
Array ( [id] => 19640468 [patent_doc_number] => 12171093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => NAND string utilizing floating body memory cell [patent_app_type] => utility [patent_app_number] => 18/377794 [patent_app_country] => US [patent_app_date] => 2023-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 47 [patent_no_of_words] => 16909 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377794 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/377794
NAND string utilizing floating body memory cell Oct 6, 2023 Issued
Array ( [id] => 19205845 [patent_doc_number] => 20240177744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => APPARATUSES AND METHODS INCLUDING CIRCUITS IN GAP REGIONS OF A MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 18/481855 [patent_app_country] => US [patent_app_date] => 2023-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18481855 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/481855
APPARATUSES AND METHODS INCLUDING CIRCUITS IN GAP REGIONS OF A MEMORY ARRAY Oct 4, 2023 Pending
Array ( [id] => 19100745 [patent_doc_number] => 20240119973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => MEMORY DEVICES PERFORMING OFFSET COMPENSATING OPERATION [patent_app_type] => utility [patent_app_number] => 18/477773 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18477773 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/477773
Memory devices performing offset compensating operation Sep 28, 2023 Issued
Array ( [id] => 19130624 [patent_doc_number] => 20240135977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => OPERATING METHOD OF MEMORY CONTROLLER, AND MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/473492 [patent_app_country] => US [patent_app_date] => 2023-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473492 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/473492
Operating method of memory controller, and memory device Sep 24, 2023 Issued
Array ( [id] => 19130624 [patent_doc_number] => 20240135977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => OPERATING METHOD OF MEMORY CONTROLLER, AND MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/473492 [patent_app_country] => US [patent_app_date] => 2023-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473492 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/473492
Operating method of memory controller, and memory device Sep 24, 2023 Issued
Array ( [id] => 20746624 [patent_doc_number] => 12646543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-02 [patent_title] => Memory device having tracking word line with adjust circuit, method of operating same and method of manufacturing same [patent_app_type] => utility [patent_app_number] => 18/472132 [patent_app_country] => US [patent_app_date] => 2023-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 11793 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18472132 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/472132
Memory device having tracking word line with adjust circuit, method of operating same and method of manufacturing same Sep 20, 2023 Issued
Array ( [id] => 20161171 [patent_doc_number] => 12387804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Anti-fuse memory device [patent_app_type] => utility [patent_app_number] => 18/370404 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370404
Anti-fuse memory device Sep 19, 2023 Issued
Array ( [id] => 20611011 [patent_doc_number] => 12586615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Controller, storage device and method for operating storage device [patent_app_type] => utility [patent_app_number] => 18/463678 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4681 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463678 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/463678
Controller, storage device and method for operating storage device Sep 7, 2023 Issued
Array ( [id] => 19704721 [patent_doc_number] => 12198767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/243258 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 39 [patent_no_of_words] => 19241 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18243258 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/243258
Semiconductor memory device Sep 6, 2023 Issued
Array ( [id] => 20177389 [patent_doc_number] => 12396154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Memory device using semiconductor element [patent_app_type] => utility [patent_app_number] => 18/461914 [patent_app_country] => US [patent_app_date] => 2023-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 2460 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 417 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18461914 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/461914
Memory device using semiconductor element Sep 5, 2023 Issued
Array ( [id] => 20611026 [patent_doc_number] => 12586630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Memory array circuit [patent_app_type] => utility [patent_app_number] => 18/242017 [patent_app_country] => US [patent_app_date] => 2023-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 4679 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18242017 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/242017
Memory array circuit Sep 4, 2023 Issued
Array ( [id] => 19567571 [patent_doc_number] => 12142348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Memory device comprising programmable command-and-address and/or data interfaces [patent_app_type] => utility [patent_app_number] => 18/460413 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 6446 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460413 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460413
Memory device comprising programmable command-and-address and/or data interfaces Aug 31, 2023 Issued
Array ( [id] => 20507889 [patent_doc_number] => 12542171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Power supply control circuit and memory system [patent_app_type] => utility [patent_app_number] => 18/459314 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459314 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/459314
Power supply control circuit and memory system Aug 30, 2023 Issued
Array ( [id] => 20416630 [patent_doc_number] => 12499919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Adaptive write scheme for memory devices [patent_app_type] => utility [patent_app_number] => 18/235739 [patent_app_country] => US [patent_app_date] => 2023-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18235739 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/235739
Adaptive write scheme for memory devices Aug 17, 2023 Issued
Array ( [id] => 20704022 [patent_doc_number] => 12626737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-12 [patent_title] => Temperature based block read [patent_app_type] => utility [patent_app_number] => 18/448393 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5590 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448393 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448393
Temperature based block read Aug 10, 2023 Issued
Array ( [id] => 19740983 [patent_doc_number] => 12217822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Memory device with source line control [patent_app_type] => utility [patent_app_number] => 18/232542 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 16455 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/232542
Memory device with source line control Aug 9, 2023 Issued
Array ( [id] => 18812254 [patent_doc_number] => 20230386591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => NON-VOLATILE MEMORY CIRCUIT AND METHOD [patent_app_type] => utility [patent_app_number] => 18/448152 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448152 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448152
Non-volatile memory circuit and method Aug 9, 2023 Issued
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