
Huan Hoang
Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2154, 2827, 2511, 2818 |
| Total Applications | 3260 |
| Issued Applications | 3044 |
| Pending Applications | 110 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9705670
[patent_doc_number] => 08830748
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-09
[patent_title] => 'Methods and apparatus for soft data generation for memory devices'
[patent_app_type] => utility
[patent_app_number] => 13/063888
[patent_app_country] => US
[patent_app_date] => 2009-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 37
[patent_no_of_words] => 18721
[patent_no_of_claims] => 45
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13063888
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/063888 | Methods and apparatus for soft data generation for memory devices | Sep 29, 2009 | Issued |
Array
(
[id] => 9390812
[patent_doc_number] => 08687424
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-01
[patent_title] => 'NAND flash memory of using common P-well and method of operating the same'
[patent_app_type] => utility
[patent_app_number] => 13/063274
[patent_app_country] => US
[patent_app_date] => 2009-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 5581
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13063274
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/063274 | NAND flash memory of using common P-well and method of operating the same | Sep 8, 2009 | Issued |
Array
(
[id] => 4436009
[patent_doc_number] => 07969816
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-06-28
[patent_title] => 'Memory device'
[patent_app_type] => utility
[patent_app_number] => 12/548034
[patent_app_country] => US
[patent_app_date] => 2009-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 10721
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/969/07969816.pdf
[firstpage_image] =>[orig_patent_app_number] => 12548034
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/548034 | Memory device | Aug 25, 2009 | Issued |
Array
(
[id] => 7697986
[patent_doc_number] => 20110228604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-22
[patent_title] => 'PRELOADING DATA INTO A FLASH STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/664631
[patent_app_country] => US
[patent_app_date] => 2009-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 13064
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0228/20110228604.pdf
[firstpage_image] =>[orig_patent_app_number] => 12664631
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/664631 | Preloading data into a flash storage device | Aug 24, 2009 | Issued |
Array
(
[id] => 8117307
[patent_doc_number] => 08159875
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-04-17
[patent_title] => 'Methods of storing multiple data-bits in a non-volatile memory cell'
[patent_app_type] => utility
[patent_app_number] => 12/547130
[patent_app_country] => US
[patent_app_date] => 2009-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 8854
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/159/08159875.pdf
[firstpage_image] =>[orig_patent_app_number] => 12547130
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/547130 | Methods of storing multiple data-bits in a non-volatile memory cell | Aug 24, 2009 | Issued |
Array
(
[id] => 6069247
[patent_doc_number] => 20110044096
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-24
[patent_title] => 'Magnetic Tunnel Junction Structure'
[patent_app_type] => utility
[patent_app_number] => 12/546610
[patent_app_country] => US
[patent_app_date] => 2009-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 9600
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20110044096.pdf
[firstpage_image] =>[orig_patent_app_number] => 12546610
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/546610 | Magnetic tunnel junction structure | Aug 23, 2009 | Issued |
Array
(
[id] => 6069248
[patent_doc_number] => 20110044097
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-24
[patent_title] => 'PHASE CHANGE MEMORY AND OPERATION METHOD OF THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/545294
[patent_app_country] => US
[patent_app_date] => 2009-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2248
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20110044097.pdf
[firstpage_image] =>[orig_patent_app_number] => 12545294
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/545294 | Phase change memory and operation method of the same | Aug 20, 2009 | Issued |
Array
(
[id] => 6459541
[patent_doc_number] => 20100039871
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-18
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH AUXILIARY I/O LINE ASSIST CIRCUIT AND FUNCTIONALITY'
[patent_app_type] => utility
[patent_app_number] => 12/543262
[patent_app_country] => US
[patent_app_date] => 2009-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6986
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0039/20100039871.pdf
[firstpage_image] =>[orig_patent_app_number] => 12543262
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/543262 | Semiconductor memory device and method with auxiliary I/O line assist circuit and functionality | Aug 17, 2009 | Issued |
Array
(
[id] => 7980105
[patent_doc_number] => 08072805
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-06
[patent_title] => 'Method and system of finding a read voltage for a flash memory'
[patent_app_type] => utility
[patent_app_number] => 12/543496
[patent_app_country] => US
[patent_app_date] => 2009-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 2741
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/072/08072805.pdf
[firstpage_image] =>[orig_patent_app_number] => 12543496
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/543496 | Method and system of finding a read voltage for a flash memory | Aug 17, 2009 | Issued |
Array
(
[id] => 6069251
[patent_doc_number] => 20110044100
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-24
[patent_title] => 'FLASH MEMORY CELL AND METHOD FOR OPERATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/543234
[patent_app_country] => US
[patent_app_date] => 2009-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2764
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20110044100.pdf
[firstpage_image] =>[orig_patent_app_number] => 12543234
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/543234 | Flash memory cell and method for operating the same | Aug 17, 2009 | Issued |
Array
(
[id] => 7765452
[patent_doc_number] => 08116126
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-14
[patent_title] => 'Measurement method for reading multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition'
[patent_app_type] => utility
[patent_app_number] => 12/542146
[patent_app_country] => US
[patent_app_date] => 2009-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5294
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/116/08116126.pdf
[firstpage_image] =>[orig_patent_app_number] => 12542146
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/542146 | Measurement method for reading multi-level memory cell utilizing measurement time delay as the characteristic parameter for level definition | Aug 16, 2009 | Issued |
Array
(
[id] => 4506975
[patent_doc_number] => 07920425
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-05
[patent_title] => 'Differential flash memory programming technique'
[patent_app_type] => utility
[patent_app_number] => 12/541122
[patent_app_country] => US
[patent_app_date] => 2009-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1976
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/920/07920425.pdf
[firstpage_image] =>[orig_patent_app_number] => 12541122
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/541122 | Differential flash memory programming technique | Aug 12, 2009 | Issued |
Array
(
[id] => 7990391
[patent_doc_number] => 08077499
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-13
[patent_title] => 'Semiconductor integrated memory circuit and trimming method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/540022
[patent_app_country] => US
[patent_app_date] => 2009-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 5866
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/077/08077499.pdf
[firstpage_image] =>[orig_patent_app_number] => 12540022
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/540022 | Semiconductor integrated memory circuit and trimming method thereof | Aug 11, 2009 | Issued |
Array
(
[id] => 7999337
[patent_doc_number] => 08081516
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-20
[patent_title] => 'Method and apparatus to suppress fringing field interference of charge trapping NAND memory'
[patent_app_type] => utility
[patent_app_number] => 12/540260
[patent_app_country] => US
[patent_app_date] => 2009-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 23
[patent_no_of_words] => 9919
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/081/08081516.pdf
[firstpage_image] =>[orig_patent_app_number] => 12540260
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/540260 | Method and apparatus to suppress fringing field interference of charge trapping NAND memory | Aug 11, 2009 | Issued |
Array
(
[id] => 5951135
[patent_doc_number] => 20110032774
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-10
[patent_title] => 'Semiconductor Memory With Improved Memory Block Switching'
[patent_app_type] => utility
[patent_app_number] => 12/538492
[patent_app_country] => US
[patent_app_date] => 2009-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 9757
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0032/20110032774.pdf
[firstpage_image] =>[orig_patent_app_number] => 12538492
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/538492 | Semiconductor memory with improved memory block switching | Aug 9, 2009 | Issued |
Array
(
[id] => 5374284
[patent_doc_number] => 20090311845
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-17
[patent_title] => 'One Transistor Memory Cell with Bias Gate'
[patent_app_type] => utility
[patent_app_number] => 12/537470
[patent_app_country] => US
[patent_app_date] => 2009-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5267
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0311/20090311845.pdf
[firstpage_image] =>[orig_patent_app_number] => 12537470
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/537470 | Methods of making a semiconductor memory device | Aug 6, 2009 | Issued |
Array
(
[id] => 5489339
[patent_doc_number] => 20090290410
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-26
[patent_title] => 'SPIN TORQUE TRANSFER MRAM DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/537093
[patent_app_country] => US
[patent_app_date] => 2009-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5568
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20090290410.pdf
[firstpage_image] =>[orig_patent_app_number] => 12537093
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/537093 | Spin torque transfer MRAM device | Aug 5, 2009 | Issued |
Array
(
[id] => 6616350
[patent_doc_number] => 20100034028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-11
[patent_title] => 'METHOD FOR DRIVING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/536226
[patent_app_country] => US
[patent_app_date] => 2009-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 14334
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0034/20100034028.pdf
[firstpage_image] =>[orig_patent_app_number] => 12536226
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/536226 | Method for driving nonvolatile semiconductor memory device | Aug 4, 2009 | Issued |
Array
(
[id] => 5489350
[patent_doc_number] => 20090290421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-26
[patent_title] => 'FLASH MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/536450
[patent_app_country] => US
[patent_app_date] => 2009-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4849
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20090290421.pdf
[firstpage_image] =>[orig_patent_app_number] => 12536450
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/536450 | FLASH MEMORY DEVICE AND METHOD OF PROGRAMMING THE SAME | Aug 4, 2009 | Abandoned |
Array
(
[id] => 5489367
[patent_doc_number] => 20090290438
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-26
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE INCLUDING WRITE SELECTORS'
[patent_app_type] => utility
[patent_app_number] => 12/535212
[patent_app_country] => US
[patent_app_date] => 2009-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6300
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20090290438.pdf
[firstpage_image] =>[orig_patent_app_number] => 12535212
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/535212 | Semiconductor memory device including write selectors | Aug 3, 2009 | Issued |