
Huan Hoang
Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2154, 2827, 2511, 2818 |
| Total Applications | 3260 |
| Issued Applications | 3044 |
| Pending Applications | 110 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9628106
[patent_doc_number] => 08797795
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-05
[patent_title] => 'Methods and apparatus for intercell interference mitigation using modulation coding'
[patent_app_type] => utility
[patent_app_number] => 13/001310
[patent_app_country] => US
[patent_app_date] => 2009-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 7269
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13001310
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/001310 | Methods and apparatus for intercell interference mitigation using modulation coding | Jun 29, 2009 | Issued |
Array
(
[id] => 5494550
[patent_doc_number] => 20090262578
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-22
[patent_title] => 'Use of Data Latches in Cache Operations of Non-Volatile Memories'
[patent_app_type] => utility
[patent_app_number] => 12/495200
[patent_app_country] => US
[patent_app_date] => 2009-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 14206
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0262/20090262578.pdf
[firstpage_image] =>[orig_patent_app_number] => 12495200
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/495200 | Use of data latches in cache operations of non-volatile memories | Jun 29, 2009 | Issued |
Array
(
[id] => 5457143
[patent_doc_number] => 20090257295
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-15
[patent_title] => 'Randomizing Current Consumption in Memory Devices'
[patent_app_type] => utility
[patent_app_number] => 12/491843
[patent_app_country] => US
[patent_app_date] => 2009-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6661
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0257/20090257295.pdf
[firstpage_image] =>[orig_patent_app_number] => 12491843
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/491843 | Randomizing current consumption in memory devices | Jun 24, 2009 | Issued |
Array
(
[id] => 9877166
[patent_doc_number] => 08964447
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-02-24
[patent_title] => 'Nonvolatile semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 13/058952
[patent_app_country] => US
[patent_app_date] => 2009-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 8551
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13058952
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/058952 | Nonvolatile semiconductor memory device | Jun 23, 2009 | Issued |
Array
(
[id] => 6643373
[patent_doc_number] => 20100312965
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-09
[patent_title] => 'ADVANCED DETECTION OF MEMORY DEVICE REMOVAL, AND METHODS, DEVICES AND CONNECTORS'
[patent_app_type] => utility
[patent_app_number] => 12/478422
[patent_app_country] => US
[patent_app_date] => 2009-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4697
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0312/20100312965.pdf
[firstpage_image] =>[orig_patent_app_number] => 12478422
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/478422 | Advanced detection of memory device removal, and methods, devices and connectors | Jun 3, 2009 | Issued |
Array
(
[id] => 8106593
[patent_doc_number] => 08154949
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-04-10
[patent_title] => 'Burst termination control circuit and semiconductor memory device using the same cross-references to related application'
[patent_app_type] => utility
[patent_app_number] => 12/455616
[patent_app_country] => US
[patent_app_date] => 2009-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3460
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/154/08154949.pdf
[firstpage_image] =>[orig_patent_app_number] => 12455616
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/455616 | Burst termination control circuit and semiconductor memory device using the same cross-references to related application | Jun 3, 2009 | Issued |
Array
(
[id] => 5301800
[patent_doc_number] => 20090296452
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-03
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/453988
[patent_app_country] => US
[patent_app_date] => 2009-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4443
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20090296452.pdf
[firstpage_image] =>[orig_patent_app_number] => 12453988
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/453988 | Semiconductor device | May 27, 2009 | Issued |
Array
(
[id] => 4544433
[patent_doc_number] => 07889563
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-15
[patent_title] => 'Memory device and method of controlling read level'
[patent_app_type] => utility
[patent_app_number] => 12/453974
[patent_app_country] => US
[patent_app_date] => 2009-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8662
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/889/07889563.pdf
[firstpage_image] =>[orig_patent_app_number] => 12453974
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/453974 | Memory device and method of controlling read level | May 27, 2009 | Issued |
Array
(
[id] => 6383872
[patent_doc_number] => 20100302683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-02
[patent_title] => 'Magnetic head slider having ultra thin base layer with group 6a\nelement and protective layer'
[patent_app_type] => utility
[patent_app_number] => 12/457003
[patent_app_country] => US
[patent_app_date] => 2009-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6196
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0302/20100302683.pdf
[firstpage_image] =>[orig_patent_app_number] => 12457003
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/457003 | Magnetic head slider having ultra thin base layer with group 6anelement and protective layer | May 27, 2009 | Abandoned |
Array
(
[id] => 6385285
[patent_doc_number] => 20100302895
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-02
[patent_title] => 'ENHANCED PROGRAMMABLE PULSEWIDTH MODULATING CIRCUIT FOR ARRAY CLOCK GENERATION'
[patent_app_type] => utility
[patent_app_number] => 12/472510
[patent_app_country] => US
[patent_app_date] => 2009-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3709
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0302/20100302895.pdf
[firstpage_image] =>[orig_patent_app_number] => 12472510
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/472510 | Enhanced programmable pulsewidth modulating circuit for array clock generation | May 26, 2009 | Issued |
Array
(
[id] => 4531757
[patent_doc_number] => 07952935
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-31
[patent_title] => 'Nonvolatile memory device and program or verification method using the same'
[patent_app_type] => utility
[patent_app_number] => 12/472442
[patent_app_country] => US
[patent_app_date] => 2009-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6182
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/952/07952935.pdf
[firstpage_image] =>[orig_patent_app_number] => 12472442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/472442 | Nonvolatile memory device and program or verification method using the same | May 26, 2009 | Issued |
Array
(
[id] => 4465095
[patent_doc_number] => 07881145
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-01
[patent_title] => 'Semiconductor device and semiconductor system having the same'
[patent_app_type] => utility
[patent_app_number] => 12/453872
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5515
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/881/07881145.pdf
[firstpage_image] =>[orig_patent_app_number] => 12453872
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/453872 | Semiconductor device and semiconductor system having the same | May 25, 2009 | Issued |
Array
(
[id] => 5301806
[patent_doc_number] => 20090296458
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-03
[patent_title] => 'RESISTANCE VARIABLE MEMORY DEVICE AND METHOD OF WRITING DATA'
[patent_app_type] => utility
[patent_app_number] => 12/471526
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6219
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20090296458.pdf
[firstpage_image] =>[orig_patent_app_number] => 12471526
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/471526 | Resistance variable memory device and method of writing data | May 25, 2009 | Issued |
Array
(
[id] => 5489332
[patent_doc_number] => 20090290403
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-26
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/472004
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7362
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20090290403.pdf
[firstpage_image] =>[orig_patent_app_number] => 12472004
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/472004 | Semiconductor device | May 25, 2009 | Issued |
Array
(
[id] => 6384936
[patent_doc_number] => 20100302845
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-02
[patent_title] => 'MEMORY DEVICE AND METHODS FOR FABRICATING AND OPERATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/471660
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 10931
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0302/20100302845.pdf
[firstpage_image] =>[orig_patent_app_number] => 12471660
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/471660 | Memory device and methods for fabricating and operating the same | May 25, 2009 | Issued |
Array
(
[id] => 6384853
[patent_doc_number] => 20100302835
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-02
[patent_title] => 'LIMITED CHARGE DELIVERY FOR PROGRAMMING NON-VOLATILE STORAGE ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 12/472074
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 12754
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0302/20100302835.pdf
[firstpage_image] =>[orig_patent_app_number] => 12472074
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/472074 | Limited charge delivery for programming non-volatile storage elements | May 25, 2009 | Issued |
Array
(
[id] => 4465029
[patent_doc_number] => 07881115
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-01
[patent_title] => 'Method of programming nonvolatile memory device'
[patent_app_type] => utility
[patent_app_number] => 12/471546
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3281
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/881/07881115.pdf
[firstpage_image] =>[orig_patent_app_number] => 12471546
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/471546 | Method of programming nonvolatile memory device | May 25, 2009 | Issued |
Array
(
[id] => 5301809
[patent_doc_number] => 20090296461
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-03
[patent_title] => 'Memory Devices and Related Data Storage Devices and Systems Including the Same'
[patent_app_type] => utility
[patent_app_number] => 12/471630
[patent_app_country] => US
[patent_app_date] => 2009-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6413
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20090296461.pdf
[firstpage_image] =>[orig_patent_app_number] => 12471630
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/471630 | Memory Devices and Related Data Storage Devices and Systems Including the Same | May 25, 2009 | Abandoned |
Array
(
[id] => 6286270
[patent_doc_number] => 20100157696
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-24
[patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS AND A METHOD FOR READING DATA STORED THEREIN'
[patent_app_type] => utility
[patent_app_number] => 12/470836
[patent_app_country] => US
[patent_app_date] => 2009-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4730
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0157/20100157696.pdf
[firstpage_image] =>[orig_patent_app_number] => 12470836
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/470836 | Semiconductor memory apparatus and a method for reading data stored therein | May 21, 2009 | Issued |
Array
(
[id] => 6530548
[patent_doc_number] => 20100124129
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-20
[patent_title] => 'DATA WRITING APPARATUS AND METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/470012
[patent_app_country] => US
[patent_app_date] => 2009-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3980
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0124/20100124129.pdf
[firstpage_image] =>[orig_patent_app_number] => 12470012
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/470012 | Data writing apparatus and method for semiconductor integrated circuit | May 20, 2009 | Issued |