
Huan Hoang
Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2154, 2827, 2511, 2818 |
| Total Applications | 3260 |
| Issued Applications | 3044 |
| Pending Applications | 110 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6564815
[patent_doc_number] => 20100128541
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-27
[patent_title] => 'INTEGRATED CIRCUIT HAVING MEMORY WITH CONFIGURABLE READ/WRITE OPERATIONS AND METHOD THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 12/275622
[patent_app_country] => US
[patent_app_date] => 2008-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7777
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0128/20100128541.pdf
[firstpage_image] =>[orig_patent_app_number] => 12275622
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/275622 | Integrated circuit having memory with configurable read/write operations and method therefor | Nov 20, 2008 | Issued |
Array
(
[id] => 7765248
[patent_doc_number] => 08116030
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-14
[patent_title] => 'Locating feature for mounting a component to a base'
[patent_app_type] => utility
[patent_app_number] => 12/275449
[patent_app_country] => US
[patent_app_date] => 2008-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3976
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/116/08116030.pdf
[firstpage_image] =>[orig_patent_app_number] => 12275449
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/275449 | Locating feature for mounting a component to a base | Nov 20, 2008 | Issued |
Array
(
[id] => 5424456
[patent_doc_number] => 20090150912
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-11
[patent_title] => 'Optical Disk Device with Magnetic Latching Function and the Same in Computer Apparatus'
[patent_app_type] => utility
[patent_app_number] => 12/274802
[patent_app_country] => US
[patent_app_date] => 2008-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2553
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0150/20090150912.pdf
[firstpage_image] =>[orig_patent_app_number] => 12274802
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/274802 | Optical Disk Device with Magnetic Latching Function and the Same in Computer Apparatus | Nov 19, 2008 | Abandoned |
Array
(
[id] => 4577020
[patent_doc_number] => 07848129
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-12-07
[patent_title] => 'Dynamically partitioned CAM array'
[patent_app_type] => utility
[patent_app_number] => 12/275160
[patent_app_country] => US
[patent_app_date] => 2008-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 9004
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/848/07848129.pdf
[firstpage_image] =>[orig_patent_app_number] => 12275160
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/275160 | Dynamically partitioned CAM array | Nov 19, 2008 | Issued |
Array
(
[id] => 8447597
[patent_doc_number] => 08289656
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-10-16
[patent_title] => 'Disk drive comprising stacked and stepped traces for improved transmission line performance'
[patent_app_type] => utility
[patent_app_number] => 12/273725
[patent_app_country] => US
[patent_app_date] => 2008-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 1465
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12273725
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/273725 | Disk drive comprising stacked and stepped traces for improved transmission line performance | Nov 18, 2008 | Issued |
Array
(
[id] => 6528654
[patent_doc_number] => 20100123976
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-20
[patent_title] => 'ARM MOUNTED SHOCK SENSOR AND FLEXIBLE CIRCUIT ROUTING'
[patent_app_type] => utility
[patent_app_number] => 12/273838
[patent_app_country] => US
[patent_app_date] => 2008-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4838
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0123/20100123976.pdf
[firstpage_image] =>[orig_patent_app_number] => 12273838
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/273838 | Arm mounted shock sensor and flexible circuit routing | Nov 18, 2008 | Issued |
Array
(
[id] => 5408706
[patent_doc_number] => 20090122604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-14
[patent_title] => 'METHOD OF OPERATING INTEGRATED CIRCUIT EMBEDDED WITH NON-VOLATILE PROGRAMMABLE MEMORY HAVING VARIABLE COUPLING RELATED APPLICATION DATA'
[patent_app_type] => utility
[patent_app_number] => 12/271680
[patent_app_country] => US
[patent_app_date] => 2008-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6238
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0122/20090122604.pdf
[firstpage_image] =>[orig_patent_app_number] => 12271680
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/271680 | Method of operating integrated circuit embedded with non-volatile programmable memory having variable coupling related application data | Nov 13, 2008 | Issued |
Array
(
[id] => 5565805
[patent_doc_number] => 20090138658
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-28
[patent_title] => 'Cache memory system for a data processing apparatus'
[patent_app_type] => utility
[patent_app_number] => 12/292148
[patent_app_country] => US
[patent_app_date] => 2008-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 18666
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20090138658.pdf
[firstpage_image] =>[orig_patent_app_number] => 12292148
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/292148 | Cache memory system for a data processing apparatus | Nov 11, 2008 | Issued |
Array
(
[id] => 104586
[patent_doc_number] => 07729167
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-01
[patent_title] => 'Programming a memory with varying bits per cell'
[patent_app_type] => utility
[patent_app_number] => 12/267694
[patent_app_country] => US
[patent_app_date] => 2008-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 7014
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/729/07729167.pdf
[firstpage_image] =>[orig_patent_app_number] => 12267694
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/267694 | Programming a memory with varying bits per cell | Nov 9, 2008 | Issued |
Array
(
[id] => 5408764
[patent_doc_number] => 20090122662
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-14
[patent_title] => 'Optical pickup'
[patent_app_type] => utility
[patent_app_number] => 12/292022
[patent_app_country] => US
[patent_app_date] => 2008-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8130
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0122/20090122662.pdf
[firstpage_image] =>[orig_patent_app_number] => 12292022
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/292022 | Optical pickup | Nov 9, 2008 | Issued |
Array
(
[id] => 6310088
[patent_doc_number] => 20100110783
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-06
[patent_title] => 'SPIN TORQUE TRANSFER CELL STRUCTURE UTILIZING FIELD-INDUCED ANTIFERROMAGNETIC OR FERROMAGNETIC COUPLING'
[patent_app_type] => utility
[patent_app_number] => 12/265340
[patent_app_country] => US
[patent_app_date] => 2008-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6021
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0110/20100110783.pdf
[firstpage_image] =>[orig_patent_app_number] => 12265340
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/265340 | Spin torque transfer cell structure utilizing field-induced antiferromagnetic or ferromagnetic coupling | Nov 4, 2008 | Issued |
Array
(
[id] => 5481790
[patent_doc_number] => 20090204747
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-08-13
[patent_title] => 'Non binary flash array architecture and method of operation'
[patent_app_type] => utility
[patent_app_number] => 12/289724
[patent_app_country] => US
[patent_app_date] => 2008-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 10959
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0204/20090204747.pdf
[firstpage_image] =>[orig_patent_app_number] => 12289724
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/289724 | Non binary flash array architecture and method of operation | Nov 2, 2008 | Issued |
Array
(
[id] => 94655
[patent_doc_number] => 07733703
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-08
[patent_title] => 'Method for non-volatile memory with background data latch caching during read operations'
[patent_app_type] => utility
[patent_app_number] => 12/263658
[patent_app_country] => US
[patent_app_date] => 2008-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 59
[patent_no_of_words] => 30275
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/733/07733703.pdf
[firstpage_image] =>[orig_patent_app_number] => 12263658
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/263658 | Method for non-volatile memory with background data latch caching during read operations | Nov 2, 2008 | Issued |
Array
(
[id] => 4503757
[patent_doc_number] => 07948785
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-24
[patent_title] => 'Semiconductor devices having sense amplifiers and electronic systems employing the same'
[patent_app_type] => utility
[patent_app_number] => 12/289650
[patent_app_country] => US
[patent_app_date] => 2008-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5927
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/948/07948785.pdf
[firstpage_image] =>[orig_patent_app_number] => 12289650
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/289650 | Semiconductor devices having sense amplifiers and electronic systems employing the same | Oct 30, 2008 | Issued |
Array
(
[id] => 4571443
[patent_doc_number] => 07839715
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-23
[patent_title] => 'SerDes double rate bitline with interlock to block precharge capture'
[patent_app_type] => utility
[patent_app_number] => 12/260376
[patent_app_country] => US
[patent_app_date] => 2008-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1989
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 310
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/839/07839715.pdf
[firstpage_image] =>[orig_patent_app_number] => 12260376
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/260376 | SerDes double rate bitline with interlock to block precharge capture | Oct 28, 2008 | Issued |
Array
(
[id] => 7551945
[patent_doc_number] => 08064282
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-22
[patent_title] => 'Method of accessing synchronous dynamic random access memory, memory control circuit, and memory system including the same'
[patent_app_type] => utility
[patent_app_number] => 12/289446
[patent_app_country] => US
[patent_app_date] => 2008-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8907
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/064/08064282.pdf
[firstpage_image] =>[orig_patent_app_number] => 12289446
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/289446 | Method of accessing synchronous dynamic random access memory, memory control circuit, and memory system including the same | Oct 27, 2008 | Issued |
Array
(
[id] => 6433468
[patent_doc_number] => 20100103762
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-29
[patent_title] => 'Memory device and method'
[patent_app_type] => utility
[patent_app_number] => 12/288984
[patent_app_country] => US
[patent_app_date] => 2008-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5982
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0103/20100103762.pdf
[firstpage_image] =>[orig_patent_app_number] => 12288984
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/288984 | Memory device and method | Oct 22, 2008 | Issued |
Array
(
[id] => 5329313
[patent_doc_number] => 20090109790
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-30
[patent_title] => 'Semiconductor device including anti-fuse circuit, and method of writing address to anti-fuse circuit'
[patent_app_type] => utility
[patent_app_number] => 12/289196
[patent_app_country] => US
[patent_app_date] => 2008-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8810
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0109/20090109790.pdf
[firstpage_image] =>[orig_patent_app_number] => 12289196
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/289196 | Semiconductor device including anti-fuse circuit, and method of writing address to anti-fuse circuit | Oct 21, 2008 | Issued |
Array
(
[id] => 4474622
[patent_doc_number] => 07944750
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-05-17
[patent_title] => 'Multi-programmable non-volatile memory cell'
[patent_app_type] => utility
[patent_app_number] => 12/288762
[patent_app_country] => US
[patent_app_date] => 2008-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4952
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 281
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/944/07944750.pdf
[firstpage_image] =>[orig_patent_app_number] => 12288762
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/288762 | Multi-programmable non-volatile memory cell | Oct 21, 2008 | Issued |
Array
(
[id] => 6589215
[patent_doc_number] => 20100097853
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-22
[patent_title] => 'Jeet memory cell'
[patent_app_type] => utility
[patent_app_number] => 12/288508
[patent_app_country] => US
[patent_app_date] => 2008-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4643
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20100097853.pdf
[firstpage_image] =>[orig_patent_app_number] => 12288508
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/288508 | Jeet memory cell | Oct 19, 2008 | Abandoned |