Search

Huan Hoang

Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2154, 2827, 2511, 2818
Total Applications
3260
Issued Applications
3044
Pending Applications
110
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4662304 [patent_doc_number] => 20080253211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/846634 [patent_app_country] => US [patent_app_date] => 2007-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7434 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20080253211.pdf [firstpage_image] =>[orig_patent_app_number] => 11846634 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/846634
Semiconductor memory device Aug 28, 2007 Issued
Array ( [id] => 346169 [patent_doc_number] => 07499361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-03 [patent_title] => 'Dynamic random access memory device and method for self-refreshing memory cells with temperature compensated self-refresh' [patent_app_type] => utility [patent_app_number] => 11/835663 [patent_app_country] => US [patent_app_date] => 2007-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 20165 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/499/07499361.pdf [firstpage_image] =>[orig_patent_app_number] => 11835663 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/835663
Dynamic random access memory device and method for self-refreshing memory cells with temperature compensated self-refresh Aug 7, 2007 Issued
Array ( [id] => 5393308 [patent_doc_number] => 20090210621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'NONVOLATILE MEMORY DEVICE, NONVOLATILE MEMORY SYSTEM, AND ACCESS DEVICE' [patent_app_type] => utility [patent_app_number] => 12/374670 [patent_app_country] => US [patent_app_date] => 2007-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9981 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20090210621.pdf [firstpage_image] =>[orig_patent_app_number] => 12374670 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/374670
Nonvolatile memory device, nonvolatile memory system, and access device Jul 25, 2007 Issued
Array ( [id] => 5084088 [patent_doc_number] => 20070274139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Semiconductor memory device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/826751 [patent_app_country] => US [patent_app_date] => 2007-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6394 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20070274139.pdf [firstpage_image] =>[orig_patent_app_number] => 11826751 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/826751
Semiconductor memory device and semiconductor device Jul 17, 2007 Issued
Array ( [id] => 586066 [patent_doc_number] => 07460429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-02 [patent_title] => 'Circuit and method for reducing power in a memory device during standby modes' [patent_app_type] => utility [patent_app_number] => 11/778366 [patent_app_country] => US [patent_app_date] => 2007-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6584 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/460/07460429.pdf [firstpage_image] =>[orig_patent_app_number] => 11778366 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/778366
Circuit and method for reducing power in a memory device during standby modes Jul 15, 2007 Issued
Array ( [id] => 4858141 [patent_doc_number] => 20080266991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'Synchronous Page-Mode Phase-Change Memory with ECC and RAM Cache' [patent_app_type] => utility [patent_app_number] => 11/769324 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7777 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20080266991.pdf [firstpage_image] =>[orig_patent_app_number] => 11769324 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/769324
Synchronous page-mode phase-change memory with ECC and RAM cache Jun 26, 2007 Issued
Array ( [id] => 4851085 [patent_doc_number] => 20080316827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'NON-VOLATILE STORAGE WITH INDIVIDUALLY CONTROLLABLE SHIELD PLATES BETWEEN STORAGE ELEMENTS' [patent_app_type] => utility [patent_app_number] => 11/767652 [patent_app_country] => US [patent_app_date] => 2007-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11174 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0316/20080316827.pdf [firstpage_image] =>[orig_patent_app_number] => 11767652 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767652
Non-volatile storage with individually controllable shield plates between storage elements Jun 24, 2007 Issued
Array ( [id] => 4851088 [patent_doc_number] => 20080316830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'COMPENSATION METHOD TO ACHIEVE UNIFORM PROGRAMMING SPEED OF FLASH MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 11/767622 [patent_app_country] => US [patent_app_date] => 2007-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0316/20080316830.pdf [firstpage_image] =>[orig_patent_app_number] => 11767622 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767622
Compensation method to achieve uniform programming speed of flash memory devices Jun 24, 2007 Issued
Array ( [id] => 578623 [patent_doc_number] => 07466611 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-16 [patent_title] => 'Selection method of bit line redundancy repair and apparatus performing the same' [patent_app_type] => utility [patent_app_number] => 11/767154 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 8863 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/466/07466611.pdf [firstpage_image] =>[orig_patent_app_number] => 11767154 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767154
Selection method of bit line redundancy repair and apparatus performing the same Jun 21, 2007 Issued
Array ( [id] => 5209341 [patent_doc_number] => 20070247925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Method for programming multi-level nitride read-only memory cells' [patent_app_type] => utility [patent_app_number] => 11/821410 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5394 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0247/20070247925.pdf [firstpage_image] =>[orig_patent_app_number] => 11821410 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/821410
Method for programming multi-level nitride read-only memory cells Jun 21, 2007 Issued
Array ( [id] => 212472 [patent_doc_number] => 07623384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/767234 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 39 [patent_no_of_words] => 17041 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/623/07623384.pdf [firstpage_image] =>[orig_patent_app_number] => 11767234 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767234
Nonvolatile semiconductor memory Jun 21, 2007 Issued
Array ( [id] => 592200 [patent_doc_number] => 07450452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Method to identify or screen VMIN drift on memory cells during burn-in or operation' [patent_app_type] => utility [patent_app_number] => 11/767182 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/450/07450452.pdf [firstpage_image] =>[orig_patent_app_number] => 11767182 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767182
Method to identify or screen VMIN drift on memory cells during burn-in or operation Jun 21, 2007 Issued
Array ( [id] => 26161 [patent_doc_number] => 07796424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Memory device having drift compensated read operation and associated method' [patent_app_type] => utility [patent_app_number] => 11/766566 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4102 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/796/07796424.pdf [firstpage_image] =>[orig_patent_app_number] => 11766566 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/766566
Memory device having drift compensated read operation and associated method Jun 20, 2007 Issued
Array ( [id] => 4931711 [patent_doc_number] => 20080002486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'METHOD FOR ACCESSING A MEMORY' [patent_app_type] => utility [patent_app_number] => 11/766782 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5456 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20080002486.pdf [firstpage_image] =>[orig_patent_app_number] => 11766782 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/766782
Method for accessing a memory Jun 20, 2007 Issued
Array ( [id] => 4851071 [patent_doc_number] => 20080316813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'MULTI-LEVEL CELL SERIAL-PARALLEL SENSE SCHEME FOR NON-VOLATILE FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 11/766248 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2796 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0316/20080316813.pdf [firstpage_image] =>[orig_patent_app_number] => 11766248 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/766248
Multi-level cell serial-parallel sense scheme for non-volatile flash memory Jun 20, 2007 Issued
Array ( [id] => 578289 [patent_doc_number] => 07466587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-16 [patent_title] => 'Non-volatile memory device and method of programming a multi level cell in the same' [patent_app_type] => utility [patent_app_number] => 11/765518 [patent_app_country] => US [patent_app_date] => 2007-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 11095 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/466/07466587.pdf [firstpage_image] =>[orig_patent_app_number] => 11765518 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/765518
Non-volatile memory device and method of programming a multi level cell in the same Jun 19, 2007 Issued
Array ( [id] => 4851070 [patent_doc_number] => 20080316812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'PROGRAMMING A MEMORY WITH VARYING BITS PER CELL' [patent_app_type] => utility [patent_app_number] => 11/765062 [patent_app_country] => US [patent_app_date] => 2007-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0316/20080316812.pdf [firstpage_image] =>[orig_patent_app_number] => 11765062 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/765062
Programming a memory with varying bits per cell Jun 18, 2007 Issued
Array ( [id] => 293378 [patent_doc_number] => 07545676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Well bias circuit in a memory device and method of operating the same' [patent_app_type] => utility [patent_app_number] => 11/760768 [patent_app_country] => US [patent_app_date] => 2007-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3343 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/545/07545676.pdf [firstpage_image] =>[orig_patent_app_number] => 11760768 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/760768
Well bias circuit in a memory device and method of operating the same Jun 9, 2007 Issued
Array ( [id] => 5090617 [patent_doc_number] => 20070230256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'METHOD AND APPARATUS FOR FILTERING OUTPUT DATA' [patent_app_type] => utility [patent_app_number] => 11/758352 [patent_app_country] => US [patent_app_date] => 2007-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2994 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20070230256.pdf [firstpage_image] =>[orig_patent_app_number] => 11758352 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/758352
Method and apparatus for filtering output data Jun 4, 2007 Issued
Array ( [id] => 5090618 [patent_doc_number] => 20070230257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'METHOD AND APPARATUS FOR FILTERING OUTPUT DATA' [patent_app_type] => utility [patent_app_number] => 11/758373 [patent_app_country] => US [patent_app_date] => 2007-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2988 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20070230257.pdf [firstpage_image] =>[orig_patent_app_number] => 11758373 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/758373
Method and apparatus for filtering output data Jun 4, 2007 Issued
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