
Huan Hoang
Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2154, 2827, 2511, 2818 |
| Total Applications | 3260 |
| Issued Applications | 3044 |
| Pending Applications | 110 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5055489
[patent_doc_number] => 20070058410
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-15
[patent_title] => 'Methods and apparatus of stacking DRAMs'
[patent_app_type] => utility
[patent_app_number] => 11/515406
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/515406 | Methods and apparatus of stacking DRAMs | Aug 31, 2006 | Issued |
Array
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[patent_issue_date] => 2007-12-18
[patent_title] => 'Semiconductor memories with refreshing cycles'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/514648 | Semiconductor memories with refreshing cycles | Aug 31, 2006 | Issued |
Array
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[patent_issue_date] => 2009-01-13
[patent_title] => 'Semiconductor integrated circuit device'
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Array
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[patent_title] => 'Semiconductor integrated circuit device'
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Array
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[patent_title] => 'Divisible true dual port memory system supporting simple dual port memory subsystems'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/501616 | Divisible true dual port memory system supporting simple dual port memory subsystems | Aug 7, 2006 | Issued |
Array
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[patent_title] => 'Non-Volatile System with Program Time Control'
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Array
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[patent_title] => 'Method and architecture to calibrate read operations in synchronous flash memory'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/495404 | Method and architecture to calibrate read operations in synchronous flash memory | Jul 27, 2006 | Issued |
Array
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[patent_title] => 'Non-volatile semiconductor memory device and semiconductor disk device'
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Array
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[patent_title] => 'Method of controlling memory and memory system thereof'
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Array
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[id] => 5660248
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[patent_title] => 'Systems-On-Chips Including Programmed Memory Cells and Programmable and Erasable Memory Cells'
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Array
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[id] => 4908421
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[patent_title] => 'Memory device and method for verifying information stored in memory cells'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/489702 | Memory device and method for verifying information stored in memory cells | Jul 18, 2006 | Issued |
Array
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[id] => 5544405
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Array
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Array
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Array
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Array
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Array
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