Search

Huan Hoang

Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2154, 2827, 2511, 2818
Total Applications
3260
Issued Applications
3044
Pending Applications
110
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 451366 [patent_doc_number] => 07251181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-31 [patent_title] => 'Techniques for storing accurate operating current values' [patent_app_type] => utility [patent_app_number] => 11/338200 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4814 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/251/07251181.pdf [firstpage_image] =>[orig_patent_app_number] => 11338200 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/338200
Techniques for storing accurate operating current values Jan 23, 2006 Issued
Array ( [id] => 5840567 [patent_doc_number] => 20060120184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Sense amplifier driver and semiconductor device comprising the same' [patent_app_type] => utility [patent_app_number] => 11/323855 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6725 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20060120184.pdf [firstpage_image] =>[orig_patent_app_number] => 11323855 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/323855
Sense amplifier driver and semiconductor device comprising the same Dec 29, 2005 Issued
Array ( [id] => 5782296 [patent_doc_number] => 20060203547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/319474 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20060203547.pdf [firstpage_image] =>[orig_patent_app_number] => 11319474 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319474
Semiconductor memory device Dec 28, 2005 Issued
Array ( [id] => 4981711 [patent_doc_number] => 20070086269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-19 [patent_title] => 'Clock control circuit and semiconductor memory device including the same and input operation method of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/319550 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4634 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20070086269.pdf [firstpage_image] =>[orig_patent_app_number] => 11319550 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319550
Clock control circuit and semiconductor memory device including the same and input operation method of semiconductor memory device Dec 28, 2005 Issued
Array ( [id] => 926353 [patent_doc_number] => 07317653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-08 [patent_title] => 'Semiconductor memory device having sense amp over-driving structure and method of over-driving sense amplifier thereof' [patent_app_type] => utility [patent_app_number] => 11/319566 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2117 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/317/07317653.pdf [firstpage_image] =>[orig_patent_app_number] => 11319566 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319566
Semiconductor memory device having sense amp over-driving structure and method of over-driving sense amplifier thereof Dec 28, 2005 Issued
Array ( [id] => 5251812 [patent_doc_number] => 20070133268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Phase change memory device and memory cell array thereof' [patent_app_type] => utility [patent_app_number] => 11/319364 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3546 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20070133268.pdf [firstpage_image] =>[orig_patent_app_number] => 11319364 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319364
Phase change memory device and memory cell array thereof Dec 28, 2005 Issued
Array ( [id] => 289827 [patent_doc_number] => 07548446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-16 [patent_title] => 'Phase change memory device and associated wordline driving circuit' [patent_app_type] => utility [patent_app_number] => 11/319604 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4389 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/548/07548446.pdf [firstpage_image] =>[orig_patent_app_number] => 11319604 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319604
Phase change memory device and associated wordline driving circuit Dec 28, 2005 Issued
Array ( [id] => 5595038 [patent_doc_number] => 20060158954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Semiconductor memory device, system with semiconductor memory device, and method for operating a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/319754 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7084 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20060158954.pdf [firstpage_image] =>[orig_patent_app_number] => 11319754 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319754
Semiconductor memory device, system with semiconductor memory device, and method for operating a semiconductor memory device Dec 28, 2005 Issued
Array ( [id] => 416737 [patent_doc_number] => 07280429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-09 [patent_title] => 'Data latch circuit of semiconductor device and method for latching data signal' [patent_app_type] => utility [patent_app_number] => 11/319614 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4687 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/280/07280429.pdf [firstpage_image] =>[orig_patent_app_number] => 11319614 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319614
Data latch circuit of semiconductor device and method for latching data signal Dec 28, 2005 Issued
Array ( [id] => 887703 [patent_doc_number] => 07352616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-01 [patent_title] => 'Phase change random access memory, boosting charge pump and method of generating write driving voltage' [patent_app_type] => utility [patent_app_number] => 11/319602 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4699 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/352/07352616.pdf [firstpage_image] =>[orig_patent_app_number] => 11319602 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319602
Phase change random access memory, boosting charge pump and method of generating write driving voltage Dec 28, 2005 Issued
Array ( [id] => 5665872 [patent_doc_number] => 20060171222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Memory device' [patent_app_type] => utility [patent_app_number] => 11/319799 [patent_app_country] => US [patent_app_date] => 2005-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6020 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20060171222.pdf [firstpage_image] =>[orig_patent_app_number] => 11319799 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319799
Memory device Dec 26, 2005 Issued
Array ( [id] => 5864388 [patent_doc_number] => 20060098518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Memory array with staged output' [patent_app_type] => utility [patent_app_number] => 11/315160 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3673 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20060098518.pdf [firstpage_image] =>[orig_patent_app_number] => 11315160 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/315160
Memory array with staged output Dec 22, 2005 Issued
Array ( [id] => 387531 [patent_doc_number] => 07304902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Pre-charge voltage supply circuit of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/275162 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3981 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/304/07304902.pdf [firstpage_image] =>[orig_patent_app_number] => 11275162 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275162
Pre-charge voltage supply circuit of semiconductor device Dec 15, 2005 Issued
Array ( [id] => 5806393 [patent_doc_number] => 20060092746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Semiconductor memory device capable of reducing power consumption during reading and standby' [patent_app_type] => utility [patent_app_number] => 11/304817 [patent_app_country] => US [patent_app_date] => 2005-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11156 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0092/20060092746.pdf [firstpage_image] =>[orig_patent_app_number] => 11304817 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/304817
Semiconductor memory device capable of reducing power consumption during reading and standby Dec 15, 2005 Issued
Array ( [id] => 482428 [patent_doc_number] => 07224638 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-29 [patent_title] => 'Reliability clock domain crossing' [patent_app_type] => utility [patent_app_number] => 11/304166 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3754 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/224/07224638.pdf [firstpage_image] =>[orig_patent_app_number] => 11304166 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/304166
Reliability clock domain crossing Dec 14, 2005 Issued
Array ( [id] => 887713 [patent_doc_number] => 07352619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-01 [patent_title] => 'Electronic memory with binary storage elements' [patent_app_type] => utility [patent_app_number] => 11/292741 [patent_app_country] => US [patent_app_date] => 2005-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6407 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/352/07352619.pdf [firstpage_image] =>[orig_patent_app_number] => 11292741 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/292741
Electronic memory with binary storage elements Dec 1, 2005 Issued
Array ( [id] => 713961 [patent_doc_number] => 07057927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Floating-body dynamic random access memory with purge line' [patent_app_type] => utility [patent_app_number] => 11/289621 [patent_app_country] => US [patent_app_date] => 2005-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3358 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/057/07057927.pdf [firstpage_image] =>[orig_patent_app_number] => 11289621 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/289621
Floating-body dynamic random access memory with purge line Nov 29, 2005 Issued
Array ( [id] => 5714389 [patent_doc_number] => 20060077752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Phase controlled high speed interfaces' [patent_app_type] => utility [patent_app_number] => 11/287380 [patent_app_country] => US [patent_app_date] => 2005-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5666 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20060077752.pdf [firstpage_image] =>[orig_patent_app_number] => 11287380 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/287380
Phase controlled high speed interfaces Nov 27, 2005 Issued
Array ( [id] => 5838926 [patent_doc_number] => 20060119406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Flip-flop with additional state storage in the event of turn-off' [patent_app_type] => utility [patent_app_number] => 11/274048 [patent_app_country] => US [patent_app_date] => 2005-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9691 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20060119406.pdf [firstpage_image] =>[orig_patent_app_number] => 11274048 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/274048
Flip-flop with additional state storage in the event of turn-off Nov 14, 2005 Issued
Array ( [id] => 5241000 [patent_doc_number] => 20070019491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Refresh control circuit and method for performing a repetition refresh operation and semiconductor memory device having the same' [patent_app_type] => utility [patent_app_number] => 11/270650 [patent_app_country] => US [patent_app_date] => 2005-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5195 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20070019491.pdf [firstpage_image] =>[orig_patent_app_number] => 11270650 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/270650
Refresh control circuit and method for performing a repetition refresh operation and semiconductor memory device having the same Nov 9, 2005 Issued
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