Search

Huan Hoang

Examiner (ID: 18810, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2154, 2827, 2511
Total Applications
3293
Issued Applications
3069
Pending Applications
116
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19285378 [patent_doc_number] => 20240221855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => MEMORY DEVICE AND TEST METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/149676 [patent_app_country] => US [patent_app_date] => 2023-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4175 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149676 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149676
MEMORY DEVICE AND TEST METHOD THEREOF Jan 3, 2023 Abandoned
Array ( [id] => 19189730 [patent_doc_number] => 20240168643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => MEMORY SYSTEMS, OPERATION METHODS THEREOF, AND ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 18/148961 [patent_app_country] => US [patent_app_date] => 2022-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13999 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18148961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/148961
Memory systems, operation methods thereof, and electronic devices Dec 29, 2022 Issued
Array ( [id] => 19285358 [patent_doc_number] => 20240221835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => MEMORY DEVICE AND PROGRAMMING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/090499 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6537 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090499 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/090499
Memory device and programming method thereof Dec 28, 2022 Issued
Array ( [id] => 18455888 [patent_doc_number] => 20230197169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => WORDLINE OR PILLAR STATE DETECTION FOR FASTER READ ACCESS TIMES [patent_app_type] => utility [patent_app_number] => 18/083304 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18083304 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/083304
Wordline or pillar state detection for faster read access times Dec 15, 2022 Issued
Array ( [id] => 19765706 [patent_doc_number] => 12224004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Memory device, memory system, and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/081065 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 31 [patent_no_of_words] => 19259 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18081065 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/081065
Memory device, memory system, and method of operating the same Dec 13, 2022 Issued
Array ( [id] => 18905760 [patent_doc_number] => 20240021245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/994061 [patent_app_country] => US [patent_app_date] => 2022-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9840 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17994061 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/994061
Memory device and method of operating the same Nov 24, 2022 Issued
Array ( [id] => 20175701 [patent_doc_number] => 12394454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Time-division multiplexing for superconducting memory [patent_app_type] => utility [patent_app_number] => 17/993543 [patent_app_country] => US [patent_app_date] => 2022-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 18111 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17993543 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/993543
Time-division multiplexing for superconducting memory Nov 22, 2022 Issued
Array ( [id] => 18890788 [patent_doc_number] => 11869565 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Read algorithm for memory device [patent_app_type] => utility [patent_app_number] => 18/056516 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13798 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18056516 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/056516
Read algorithm for memory device Nov 16, 2022 Issued
Array ( [id] => 20002071 [patent_doc_number] => 20250140293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => POWER HOLD-OFF CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/834861 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18834861 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/834861
POWER HOLD-OFF CIRCUIT Nov 16, 2022 Pending
Array ( [id] => 18196179 [patent_doc_number] => 20230049698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/973823 [patent_app_country] => US [patent_app_date] => 2022-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17973823 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/973823
Memory device and operating method thereof Oct 25, 2022 Issued
Array ( [id] => 18688156 [patent_doc_number] => 11783899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/973549 [patent_app_country] => US [patent_app_date] => 2022-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 39 [patent_no_of_words] => 19215 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17973549 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/973549
Semiconductor memory device Oct 25, 2022 Issued
Array ( [id] => 19116122 [patent_doc_number] => 20240127872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => EXTENDED ADDRESS INTERFACE ACTIVATE SEQUENCE USING MODE REGISTER WRITE [patent_app_type] => utility [patent_app_number] => 17/965592 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9584 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965592 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965592
Extended address interface activate sequence using mode register write Oct 12, 2022 Issued
Array ( [id] => 18350084 [patent_doc_number] => 20230138195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => NONVOLATILE RESISTIVE MEMORY DEVICE USING DYNAMIC REFERENCE IN DUAL DOMAIN AND READ METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/961116 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8280 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/961116
Nonvolatile resistive memory device using dynamic reference in dual domain and read method thereof Oct 5, 2022 Issued
Array ( [id] => 19901458 [patent_doc_number] => 12279411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Memory device using semiconductor device [patent_app_type] => utility [patent_app_number] => 17/960411 [patent_app_country] => US [patent_app_date] => 2022-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 40 [patent_no_of_words] => 4609 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 609 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960411 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960411
Memory device using semiconductor device Oct 4, 2022 Issued
Array ( [id] => 18162378 [patent_doc_number] => 20230028971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/959098 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959098 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959098
Semiconductor memory device Oct 2, 2022 Issued
Array ( [id] => 19906335 [patent_doc_number] => 12283347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Word line driver and memory device [patent_app_type] => utility [patent_app_number] => 17/936823 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6399 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936823 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936823
Word line driver and memory device Sep 28, 2022 Issued
Array ( [id] => 19841825 [patent_doc_number] => 12254215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Memory device and management method thereof [patent_app_type] => utility [patent_app_number] => 17/955555 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 5481 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955555 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955555
Memory device and management method thereof Sep 28, 2022 Issued
Array ( [id] => 19639516 [patent_doc_number] => 12170129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Data receiving circuit, data receiving system and storage device [patent_app_type] => utility [patent_app_number] => 17/953413 [patent_app_country] => US [patent_app_date] => 2022-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11957 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953413 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/953413
Data receiving circuit, data receiving system and storage device Sep 26, 2022 Issued
Array ( [id] => 18334978 [patent_doc_number] => 20230126926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => EDGELESS MEMORY CLUSTERS [patent_app_type] => utility [patent_app_number] => 17/950895 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13514 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950895 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/950895
Edgeless memory clusters Sep 21, 2022 Issued
Array ( [id] => 19740957 [patent_doc_number] => 12217796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Sequence alignment with memory arrays [patent_app_type] => utility [patent_app_number] => 17/931277 [patent_app_country] => US [patent_app_date] => 2022-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8470 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17931277 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/931277
Sequence alignment with memory arrays Sep 11, 2022 Issued
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