Huan Hoang

Array ( [id] => 6982101 [patent_doc_number] => 20050152170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Bit cell array for preventing coupling effect in read only memory' [patent_app_type] => utility [patent_app_number] => 10/958116 [patent_app_country] => US [patent_app_date] => 2004-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2814 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20050152170.pdf [firstpage_image] =>[orig_patent_app_number] => 10958116 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 486985 [patent_doc_number] => 07221608 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-22 [patent_title] => 'Single NMOS device memory cell and array' [patent_app_type] => utility [patent_app_number] => 10/957986 [patent_app_country] => US [patent_app_date] => 2004-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 1497 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/221/07221608.pdf [firstpage_image] =>[orig_patent_app_number] => 10957986 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 736730 [patent_doc_number] => 07038949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Non-volatile memory device capable of changing increment of program voltage according to mode of operation' [patent_app_type] => utility [patent_app_number] => 10/957307 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4489 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038949.pdf [firstpage_image] =>[orig_patent_app_number] => 10957307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6950934 [patent_doc_number] => 20050226028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Ferroelectric memory' [patent_app_type] => utility [patent_app_number] => 10/947374 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8972 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20050226028.pdf [firstpage_image] =>[orig_patent_app_number] => 10947374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 986661 [patent_doc_number] => 06925030 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Nonvolatile ferroelectric memory device with split word lines' [patent_app_type] => utility [patent_app_number] => 10/946295 [patent_app_country] => US [patent_app_date] => 2004-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 14723 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/925/06925030.pdf [firstpage_image] =>[orig_patent_app_number] => 10946295 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7009522 [patent_doc_number] => 20050063238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/943895 [patent_app_country] => US [patent_app_date] => 2004-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 16921 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20050063238.pdf [firstpage_image] =>[orig_patent_app_number] => 10943895 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 682542 [patent_doc_number] => 07085190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-01 [patent_title] => 'Variable boost voltage row driver circuit and method, and memory device and system including same' [patent_app_type] => utility [patent_app_number] => 10/944498 [patent_app_country] => US [patent_app_date] => 2004-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10327 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085190.pdf [firstpage_image] =>[orig_patent_app_number] => 10944498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7024083 [patent_doc_number] => 20050018477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'METHOD AND APPARATUS SENSING A RESISTIVE MEMORY WITH REDUCED POWER CONSUMPTION' [patent_app_type] => utility [patent_app_number] => 10/922921 [patent_app_country] => US [patent_app_date] => 2004-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4202 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20050018477.pdf [firstpage_image] =>[orig_patent_app_number] => 10922921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7024088 [patent_doc_number] => 20050018482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'TECHNIQUES FOR REDUCING EFFECTS OF COUPLING BETWEEN STORAGE ELEMENTS OF ADJACENT ROWS OF MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 10/923320 [patent_app_country] => US [patent_app_date] => 2004-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5897 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20050018482.pdf [firstpage_image] =>[orig_patent_app_number] => 10923320 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7029989 [patent_doc_number] => 20050029051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 10/918686 [patent_app_country] => US [patent_app_date] => 2004-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11811 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20050029051.pdf [firstpage_image] =>[orig_patent_app_number] => 10918686 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1026581 [patent_doc_number] => 06885589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Synchronous up/down address generator for burst mode read' [patent_app_type] => utility [patent_app_number] => 10/901566 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5037 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885589.pdf [firstpage_image] =>[orig_patent_app_number] => 10901566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7448586 [patent_doc_number] => 20040268025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein' [patent_app_type] => new [patent_app_number] => 10/898333 [patent_app_country] => US [patent_app_date] => 2004-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 65 [patent_no_of_words] => 32293 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20040268025.pdf [firstpage_image] =>[orig_patent_app_number] => 10898333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7108456 [patent_doc_number] => 20050205909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Magnetic random access memory and data write method for the same' [patent_app_type] => utility [patent_app_number] => 10/895138 [patent_app_country] => US [patent_app_date] => 2004-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20050205909.pdf [firstpage_image] =>[orig_patent_app_number] => 10895138 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7608820 [patent_doc_number] => 06999371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-14 [patent_title] => 'Semiconductor memory device capable of reducing power consumption during reading and standby' [patent_app_type] => utility [patent_app_number] => 10/895092 [patent_app_country] => US [patent_app_date] => 2004-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 11155 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/999/06999371.pdf [firstpage_image] =>[orig_patent_app_number] => 10895092 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 786451 [patent_doc_number] => 06990007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/893949 [patent_app_country] => US [patent_app_date] => 2004-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 10581 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/990/06990007.pdf [firstpage_image] =>[orig_patent_app_number] => 10893949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5765076 [patent_doc_number] => 20060018160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'NON-VOLATILE SYSTEM WITH PROGRAM TIME CONTROL' [patent_app_type] => utility [patent_app_number] => 10/896096 [patent_app_country] => US [patent_app_date] => 2004-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3874 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20060018160.pdf [firstpage_image] =>[orig_patent_app_number] => 10896096 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 693356 [patent_doc_number] => 07075817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'Two terminal memory array having reference cells' [patent_app_type] => utility [patent_app_number] => 10/895218 [patent_app_country] => US [patent_app_date] => 2004-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6969 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/075/07075817.pdf [firstpage_image] =>[orig_patent_app_number] => 10895218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5589765 [patent_doc_number] => 20060039216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'INTEGRATED CIRCUIT MEMORY DEVICE WITH BIT LINE PRE-CHARGING BASED UPON PARTIAL ADDRESS DECORDING' [patent_app_type] => utility [patent_app_number] => 10/893809 [patent_app_country] => US [patent_app_date] => 2004-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2060 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20060039216.pdf [firstpage_image] =>[orig_patent_app_number] => 10893809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 661099 [patent_doc_number] => 07106611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Wavelength division multiplexed memory module, memory system and method' [patent_app_type] => utility [patent_app_number] => 10/893709 [patent_app_country] => US [patent_app_date] => 2004-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3894 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/106/07106611.pdf [firstpage_image] =>[orig_patent_app_number] => 10893709 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 973915 [patent_doc_number] => 06937503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => '1T1C SRAM' [patent_app_type] => utility [patent_app_number] => 10/892522 [patent_app_country] => US [patent_app_date] => 2004-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 8046 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937503.pdf [firstpage_image] =>[orig_patent_app_number] => 10892522 [rel_patent_id] =>[rel_patent_doc_number] =>)