Search

Huan Hoang

Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2154, 2827, 2511, 2818
Total Applications
3260
Issued Applications
3044
Pending Applications
110
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6924559 [patent_doc_number] => 20050237814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'NON-VOLATILE MEMORY AND CONTROL WITH IMPROVED PARTIAL PAGE PROGRAM CAPABILITY' [patent_app_type] => utility [patent_app_number] => 10/830824 [patent_app_country] => US [patent_app_date] => 2004-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14639 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20050237814.pdf [firstpage_image] =>[orig_patent_app_number] => 10830824 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/830824
Non-volatile memory and control with improved partial page program capability Apr 22, 2004 Issued
Array ( [id] => 791364 [patent_doc_number] => 06985390 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Integrated memory circuit having a redundancy circuit and a method for replacing a memory area' [patent_app_type] => utility [patent_app_number] => 10/831466 [patent_app_country] => US [patent_app_date] => 2004-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4202 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/985/06985390.pdf [firstpage_image] =>[orig_patent_app_number] => 10831466 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/831466
Integrated memory circuit having a redundancy circuit and a method for replacing a memory area Apr 22, 2004 Issued
Array ( [id] => 745601 [patent_doc_number] => 07031207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Semiconductor memory device with configurable on-chip delay circuit' [patent_app_type] => utility [patent_app_number] => 10/829523 [patent_app_country] => US [patent_app_date] => 2004-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4039 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/031/07031207.pdf [firstpage_image] =>[orig_patent_app_number] => 10829523 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/829523
Semiconductor memory device with configurable on-chip delay circuit Apr 21, 2004 Issued
Array ( [id] => 994806 [patent_doc_number] => 06917534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-12 [patent_title] => 'Offset compensated sensing for magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 10/828162 [patent_app_country] => US [patent_app_date] => 2004-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4411 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/917/06917534.pdf [firstpage_image] =>[orig_patent_app_number] => 10828162 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/828162
Offset compensated sensing for magnetic random access memory Apr 20, 2004 Issued
Array ( [id] => 980453 [patent_doc_number] => 06930946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Refresh control and internal voltage generation in semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/826365 [patent_app_country] => US [patent_app_date] => 2004-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 42 [patent_no_of_words] => 10397 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930946.pdf [firstpage_image] =>[orig_patent_app_number] => 10826365 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/826365
Refresh control and internal voltage generation in semiconductor memory device Apr 18, 2004 Issued
Array ( [id] => 704726 [patent_doc_number] => 07064996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Refreshing dynamic memory cells in a memory circuit and a memory circuit' [patent_app_type] => utility [patent_app_number] => 10/817469 [patent_app_country] => US [patent_app_date] => 2004-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6381 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064996.pdf [firstpage_image] =>[orig_patent_app_number] => 10817469 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/817469
Refreshing dynamic memory cells in a memory circuit and a memory circuit Apr 1, 2004 Issued
Array ( [id] => 749353 [patent_doc_number] => 07027323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Storage device having parallel connected memory cells that include magnetoresistive elements' [patent_app_type] => utility [patent_app_number] => 10/817462 [patent_app_country] => US [patent_app_date] => 2004-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5845 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/027/07027323.pdf [firstpage_image] =>[orig_patent_app_number] => 10817462 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/817462
Storage device having parallel connected memory cells that include magnetoresistive elements Apr 1, 2004 Issued
Array ( [id] => 7044418 [patent_doc_number] => 20050249013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-10 [patent_title] => 'Techniques for storing accurate operating current values' [patent_app_type] => utility [patent_app_number] => 10/816424 [patent_app_country] => US [patent_app_date] => 2004-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4783 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20050249013.pdf [firstpage_image] =>[orig_patent_app_number] => 10816424 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/816424
Techniques for storing accurate operating current values Mar 31, 2004 Issued
Array ( [id] => 936198 [patent_doc_number] => 06975548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Memory device having redundant memory cell' [patent_app_type] => utility [patent_app_number] => 10/812424 [patent_app_country] => US [patent_app_date] => 2004-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 10529 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975548.pdf [firstpage_image] =>[orig_patent_app_number] => 10812424 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/812424
Memory device having redundant memory cell Mar 29, 2004 Issued
Array ( [id] => 7196107 [patent_doc_number] => 20050041465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Nram bit selectable two-device nanotube array' [patent_app_type] => utility [patent_app_number] => 10/810962 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4468 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20050041465.pdf [firstpage_image] =>[orig_patent_app_number] => 10810962 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/810962
NRAM bit selectable two-device nanotube array Mar 25, 2004 Issued
Array ( [id] => 413284 [patent_doc_number] => 07283384 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-10-16 [patent_title] => 'Magnetic memory array architecture' [patent_app_type] => utility [patent_app_number] => 10/809134 [patent_app_country] => US [patent_app_date] => 2004-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 18530 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/283/07283384.pdf [firstpage_image] =>[orig_patent_app_number] => 10809134 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/809134
Magnetic memory array architecture Mar 23, 2004 Issued
Array ( [id] => 7606518 [patent_doc_number] => 07099200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'Nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 10/805460 [patent_app_country] => US [patent_app_date] => 2004-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 80 [patent_no_of_words] => 28816 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/099/07099200.pdf [firstpage_image] =>[orig_patent_app_number] => 10805460 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/805460
Nonvolatile semiconductor memory Mar 21, 2004 Issued
Array ( [id] => 7315810 [patent_doc_number] => 20040223364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Content addressable memory architecture providing improved speed' [patent_app_type] => new [patent_app_number] => 10/804562 [patent_app_country] => US [patent_app_date] => 2004-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2705 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20040223364.pdf [firstpage_image] =>[orig_patent_app_number] => 10804562 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/804562
Content addressable memory architecture providing improved speed Mar 18, 2004 Issued
Array ( [id] => 7429063 [patent_doc_number] => 20040184302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Semiconductor storage circuit and layout method for the same' [patent_app_type] => new [patent_app_number] => 10/802860 [patent_app_country] => US [patent_app_date] => 2004-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10752 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20040184302.pdf [firstpage_image] =>[orig_patent_app_number] => 10802860 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/802860
Semiconductor storage circuit and layout method for the same Mar 17, 2004 Issued
Array ( [id] => 7109804 [patent_doc_number] => 20050207258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'MEMORY DEVICE WITH COMMON ROW INTERFACE' [patent_app_type] => utility [patent_app_number] => 10/805024 [patent_app_country] => US [patent_app_date] => 2004-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7390 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20050207258.pdf [firstpage_image] =>[orig_patent_app_number] => 10805024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/805024
Memory device with common row interface Mar 17, 2004 Issued
Array ( [id] => 639738 [patent_doc_number] => 07126835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-24 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/798368 [patent_app_country] => US [patent_app_date] => 2004-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7107 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/126/07126835.pdf [firstpage_image] =>[orig_patent_app_number] => 10798368 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/798368
Semiconductor memory device Mar 11, 2004 Issued
Array ( [id] => 763745 [patent_doc_number] => 07012847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-14 [patent_title] => 'Sense amplifier driver and semiconductor device comprising the same' [patent_app_type] => utility [patent_app_number] => 10/798520 [patent_app_country] => US [patent_app_date] => 2004-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6714 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/012/07012847.pdf [firstpage_image] =>[orig_patent_app_number] => 10798520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/798520
Sense amplifier driver and semiconductor device comprising the same Mar 10, 2004 Issued
Array ( [id] => 1026573 [patent_doc_number] => 06885583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 10/796157 [patent_app_country] => US [patent_app_date] => 2004-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 45 [patent_no_of_words] => 30175 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885583.pdf [firstpage_image] =>[orig_patent_app_number] => 10796157 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/796157
Nonvolatile semiconductor memory Mar 9, 2004 Issued
Array ( [id] => 736771 [patent_doc_number] => 07038972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Double data rate synchronous dynamic random access memory semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/793209 [patent_app_country] => US [patent_app_date] => 2004-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2012 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038972.pdf [firstpage_image] =>[orig_patent_app_number] => 10793209 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/793209
Double data rate synchronous dynamic random access memory semiconductor device Mar 3, 2004 Issued
Array ( [id] => 7414110 [patent_doc_number] => 20040228198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Semiconductor memory device including reference memory cell and control method' [patent_app_type] => new [patent_app_number] => 10/792324 [patent_app_country] => US [patent_app_date] => 2004-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13014 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20040228198.pdf [firstpage_image] =>[orig_patent_app_number] => 10792324 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/792324
Semiconductor memory device including reference memory cell and control method Mar 3, 2004 Issued
Menu