Search

Huedung Xuan Cao Mancuso

Examiner (ID: 153, Phone: (571)272-1939 , Office: P/2845 )

Most Active Art Unit
2821
Art Unit(s)
2772, 2671, 2821, 2845
Total Applications
1508
Issued Applications
1276
Pending Applications
51
Abandoned Applications
190

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18998880 [patent_doc_number] => 11915733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Memory devices, circuits and methods of adjusting a sensing current for the memory device [patent_app_type] => utility [patent_app_number] => 17/577040 [patent_app_country] => US [patent_app_date] => 2022-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6566 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17577040 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/577040
Memory devices, circuits and methods of adjusting a sensing current for the memory device Jan 16, 2022 Issued
Array ( [id] => 18146158 [patent_doc_number] => 20230020015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => FLASH MEMORY DEVICE AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/575054 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575054 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575054
Flash memory device and method thereof Jan 12, 2022 Issued
Array ( [id] => 20080623 [patent_doc_number] => 12354698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Memory module with battery and electronic system having the memory module [patent_app_type] => utility [patent_app_number] => 17/574349 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 8543 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17574349 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/574349
Memory module with battery and electronic system having the memory module Jan 11, 2022 Issued
Array ( [id] => 17708259 [patent_doc_number] => 20220208267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => MEMORY MODULE FOR PLATFORM WITH NON-VOLATILE STORAGE [patent_app_type] => utility [patent_app_number] => 17/573456 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573456 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/573456
Memory module for platform with non-volatile storage Jan 10, 2022 Issued
Array ( [id] => 18304263 [patent_doc_number] => 11626176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Wear leveling in EEPROM emulator formed of flash memory cells [patent_app_type] => utility [patent_app_number] => 17/571443 [patent_app_country] => US [patent_app_date] => 2022-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6101 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17571443 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/571443
Wear leveling in EEPROM emulator formed of flash memory cells Jan 6, 2022 Issued
Array ( [id] => 17566286 [patent_doc_number] => 20220130435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => SERIES OF PARALLEL SENSING OPERATIONS FOR MULTI-LEVEL CELLS [patent_app_type] => utility [patent_app_number] => 17/571077 [patent_app_country] => US [patent_app_date] => 2022-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17571077 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/571077
Series of parallel sensing operations for multi-level cells Jan 6, 2022 Issued
Array ( [id] => 18061434 [patent_doc_number] => 20220392520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => MEMORY CONTROLLER PERFORMING DATA TRAINING, SYSTEM-ON-CHIP INCLUDING THE MEMORY CONTROLLER, AND OPERATING METHOD OF THE MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/569679 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12072 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569679 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569679
Memory controller performing data training, system-on-chip including the memory controller, and operating method of the memory controller Jan 5, 2022 Issued
Array ( [id] => 18528517 [patent_doc_number] => 11715515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Memory device comprising electrically floating body transistor [patent_app_type] => utility [patent_app_number] => 17/569417 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 66 [patent_no_of_words] => 19752 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569417
Memory device comprising electrically floating body transistor Jan 4, 2022 Issued
Array ( [id] => 20132988 [patent_doc_number] => 12375307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Operating method of physically unclonable function magnetic memory device [patent_app_type] => utility [patent_app_number] => 17/566004 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 3123 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17566004 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/566004
Operating method of physically unclonable function magnetic memory device Dec 29, 2021 Issued
Array ( [id] => 19029751 [patent_doc_number] => 11929114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Rapid tag invalidation circuit [patent_app_type] => utility [patent_app_number] => 17/564680 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564680 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/564680
Rapid tag invalidation circuit Dec 28, 2021 Issued
Array ( [id] => 18366706 [patent_doc_number] => 20230148297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => MAGNETIC HETEROJUNCTION STRUCTURE AND METHOD FOR CONTROLLING AND ACHIEVING LOGIC AND MULTIPLE-STATE STORAGE FUNCTIONS [patent_app_type] => utility [patent_app_number] => 17/645215 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645215 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645215
Magnetic heterojunction structure and method for controlling and achieving logic and multiple-state storage functions Dec 19, 2021 Issued
Array ( [id] => 17833358 [patent_doc_number] => 20220270662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/536537 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536537 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536537
Memory device and operating method thereof Nov 28, 2021 Issued
Array ( [id] => 18528538 [patent_doc_number] => 11715536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Apparatus for mitigating program disturb [patent_app_type] => utility [patent_app_number] => 17/536270 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 440 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536270 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536270
Apparatus for mitigating program disturb Nov 28, 2021 Issued
Array ( [id] => 18912862 [patent_doc_number] => 11875846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Optimization of soft bit windows based on signal and noise characteristics of memory cells [patent_app_type] => utility [patent_app_number] => 17/534907 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 14076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534907 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/534907
Optimization of soft bit windows based on signal and noise characteristics of memory cells Nov 23, 2021 Issued
Array ( [id] => 17645046 [patent_doc_number] => 20220172785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => OPERATION METHOD OF CONTROLLER CONFIGURED TO CONTROL NONVOLATILE MEMORY DEVICE AND OPERATION METHOD OF STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/534989 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534989 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/534989
Operation method of controller configured to control nonvolatile memory device and operation method of storage device Nov 23, 2021 Issued
Array ( [id] => 18848523 [patent_doc_number] => 20230410927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MAGNONIC ACTIVE RING MEMORY AND LOGIC [patent_app_type] => utility [patent_app_number] => 18/037951 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18037951 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/037951
Magnonic active ring memory and logic Nov 21, 2021 Issued
Array ( [id] => 17565243 [patent_doc_number] => 20220129392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => SEMICONDUCTOR DEVICE WITH SECURE ACCESS KEY AND ASSOCIATED METHODS AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/530461 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17530461 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/530461
Semiconductor device with secure access key and associated methods and systems Nov 18, 2021 Issued
Array ( [id] => 18607857 [patent_doc_number] => 11749333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 17/531424 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3977 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17531424 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/531424
Memory system Nov 18, 2021 Issued
Array ( [id] => 18379415 [patent_doc_number] => 20230154504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => MLM MAPPED NAND LATCH [patent_app_type] => utility [patent_app_number] => 17/455007 [patent_app_country] => US [patent_app_date] => 2021-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/455007
MLM mapped NAND latch Nov 14, 2021 Issued
Array ( [id] => 18606521 [patent_doc_number] => 11747985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Memory system, integrated circuit system, and operation method of memory system [patent_app_type] => utility [patent_app_number] => 17/507442 [patent_app_country] => US [patent_app_date] => 2021-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10570 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17507442 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/507442
Memory system, integrated circuit system, and operation method of memory system Oct 20, 2021 Issued
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