Search

Huedung Xuan Cao Mancuso

Examiner (ID: 153, Phone: (571)272-1939 , Office: P/2845 )

Most Active Art Unit
2821
Art Unit(s)
2772, 2671, 2821, 2845
Total Applications
1508
Issued Applications
1276
Pending Applications
51
Abandoned Applications
190

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16978665 [patent_doc_number] => 20210222902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => COLD STORAGE ENERGY OPTIMIZATION SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/823917 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16823917 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/823917
Cold storage energy optimization systems Mar 18, 2020 Issued
Array ( [id] => 17093510 [patent_doc_number] => 11121712 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-14 [patent_title] => Level shifters with variably adjusted control voltage and for reading memory cells [patent_app_type] => utility [patent_app_number] => 16/818153 [patent_app_country] => US [patent_app_date] => 2020-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8711 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16818153 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/818153
Level shifters with variably adjusted control voltage and for reading memory cells Mar 12, 2020 Issued
Array ( [id] => 17099293 [patent_doc_number] => 20210287084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => DETERMINING OPTIMAL AUGMENTATIONS FOR A TRAINING DATA SET [patent_app_type] => utility [patent_app_number] => 16/818891 [patent_app_country] => US [patent_app_date] => 2020-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16818891 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/818891
Determining optimal augmentations for a training data set Mar 12, 2020 Issued
Array ( [id] => 16332063 [patent_doc_number] => 20200303029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => MEDIA ERROR REPORTING IMPROVEMENTS FOR STORAGE DRIVES [patent_app_type] => utility [patent_app_number] => 16/811694 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16811694 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/811694
Media error reporting improvements for storage drives Mar 5, 2020 Issued
Array ( [id] => 17803063 [patent_doc_number] => 11417372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-16 [patent_title] => Interface protocol configuration for memory [patent_app_type] => utility [patent_app_number] => 16/811361 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7279 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16811361 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/811361
Interface protocol configuration for memory Mar 5, 2020 Issued
Array ( [id] => 17861782 [patent_doc_number] => 11442940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Apparatuses and methods for on-memory pattern matching [patent_app_type] => utility [patent_app_number] => 16/807692 [patent_app_country] => US [patent_app_date] => 2020-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6507 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16807692 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/807692
Apparatuses and methods for on-memory pattern matching Mar 2, 2020 Issued
Array ( [id] => 17167294 [patent_doc_number] => 11153409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Redundancy in a network centric process control system [patent_app_type] => utility [patent_app_number] => 16/805134 [patent_app_country] => US [patent_app_date] => 2020-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 12828 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805134 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805134
Redundancy in a network centric process control system Feb 27, 2020 Issued
Array ( [id] => 16865609 [patent_doc_number] => 11024360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Nonvolatile semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/799402 [patent_app_country] => US [patent_app_date] => 2020-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11227 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16799402 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/799402
Nonvolatile semiconductor memory device Feb 23, 2020 Issued
Array ( [id] => 16566645 [patent_doc_number] => 10892019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Methods of erasing data in nonvolatile memory devices and nonvolatile memory devices performing the same [patent_app_type] => utility [patent_app_number] => 16/788638 [patent_app_country] => US [patent_app_date] => 2020-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 12389 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16788638 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/788638
Methods of erasing data in nonvolatile memory devices and nonvolatile memory devices performing the same Feb 11, 2020 Issued
Array ( [id] => 15969031 [patent_doc_number] => 20200168267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => MEMORY DEVICE COMPRISING ELECTRICALLY FLOATING BODY TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/776160 [patent_app_country] => US [patent_app_date] => 2020-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16776160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/776160
Memory device comprising electrically floating body transistor Jan 28, 2020 Issued
Array ( [id] => 17462249 [patent_doc_number] => 20220075554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => A SYSTEM AND METHOD FOR BIDIRECTIONALLY BASED ELECTRICAL INFORMATION STORAGE, PROCESSING AND COMMUNICATION. [patent_app_type] => utility [patent_app_number] => 17/424737 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36079 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -77 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17424737 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/424737
System and method for bidirectionally based electrical information storage, processing and communication Jan 16, 2020 Issued
Array ( [id] => 16645336 [patent_doc_number] => 10923200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Apparatus and methods for determining read voltages for a read operation [patent_app_type] => utility [patent_app_number] => 16/745514 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 12638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745514 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/745514
Apparatus and methods for determining read voltages for a read operation Jan 16, 2020 Issued
Array ( [id] => 16729373 [patent_doc_number] => 20210096520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => COMPUTING STOCHASTIC SIMULATION CONTROL PARAMETERS [patent_app_type] => utility [patent_app_number] => 16/721736 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721736 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/721736
Computing stochastic simulation control parameters Dec 18, 2019 Issued
Array ( [id] => 18174459 [patent_doc_number] => 11574173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Power efficient near memory analog multiply-and-accumulate (MAC) [patent_app_type] => utility [patent_app_number] => 16/721819 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4337 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721819 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/721819
Power efficient near memory analog multiply-and-accumulate (MAC) Dec 18, 2019 Issued
Array ( [id] => 16096431 [patent_doc_number] => 20200202202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => SYNAPSE CIRCUIT WITH MEMORY [patent_app_type] => utility [patent_app_number] => 16/719761 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16719761 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/719761
Synapse circuit with memory Dec 17, 2019 Issued
Array ( [id] => 17150635 [patent_doc_number] => 11143706 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Battery capacity estimation method and battery capacity estimation device [patent_app_type] => utility [patent_app_number] => 16/718829 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6762 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16718829 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/718829
Battery capacity estimation method and battery capacity estimation device Dec 17, 2019 Issued
Array ( [id] => 16904521 [patent_doc_number] => 20210183437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => PERPECTUAL DIGITAL PERCEPTRON [patent_app_type] => utility [patent_app_number] => 16/717444 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717444 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/717444
Perpectual digital perceptron Dec 16, 2019 Issued
Array ( [id] => 16193897 [patent_doc_number] => 20200234746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => LOW STANDBY POWER WITH FAST TURN ON METHOD FOR NON-VOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/715412 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715412 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/715412
Low standby power with fast turn on method for non-volatile memory devices Dec 15, 2019 Issued
Array ( [id] => 17606910 [patent_doc_number] => 11335402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Systems and techniques for accessing multiple memory cells concurrently [patent_app_type] => utility [patent_app_number] => 16/712682 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 21735 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16712682 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/712682
Systems and techniques for accessing multiple memory cells concurrently Dec 11, 2019 Issued
Array ( [id] => 15775207 [patent_doc_number] => 20200118621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => MULTI-LEVEL SELF-SELECTING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/711361 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20162 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711361 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711361
Multi-level self-selecting memory device Dec 10, 2019 Issued
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