Huedung Xuan Cao Mancuso

Array ( [id] => 16479353 [patent_doc_number] => 10854306 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-01 [patent_title] => Common-gate comparator and fuse reader [patent_app_type] => utility [patent_app_number] => 16/576216 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10925 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576216 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16447996 [patent_doc_number] => 10839927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-17 [patent_title] => Apparatus and methods for mitigating program disturb [patent_app_type] => utility [patent_app_number] => 16/575476 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10744 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575476 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16574812 [patent_doc_number] => 10896737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-19 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/576442 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10258 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16802571 [patent_doc_number] => 10997520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Single-cycle operations using controllably mediated exchange-type interactions between qubits [patent_app_type] => utility [patent_app_number] => 16/568318 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9979 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15327793 [patent_doc_number] => 20200004226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => FABRICATING THREE-DIMENSIONAL OBJECTS [patent_app_type] => utility [patent_app_number] => 16/567278 [patent_app_country] => US [patent_app_date] => 2019-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16567278 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15298309 [patent_doc_number] => 20190392290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => NEURAL NETWORK CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/562534 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4012 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562534 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15298307 [patent_doc_number] => 20190392289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => NEURAL NETWORK CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/561207 [patent_app_country] => US [patent_app_date] => 2019-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3504 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16561207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17573930 [patent_doc_number] => 11322204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/557898 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 18022 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15266097 [patent_doc_number] => 20190381782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => DETERMINE A MANUFACTURING BATCH [patent_app_type] => utility [patent_app_number] => 16/557950 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5750 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557950 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15642305 [patent_doc_number] => 10594168 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Intruding metal detection method for induction type power supply system and related supplying-end module [patent_app_type] => utility [patent_app_number] => 16/547588 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11448 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17907768 [patent_doc_number] => 11461623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Method and apparatus for defect-tolerant memory-based artificial neural network [patent_app_type] => utility [patent_app_number] => 16/542049 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542049 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16944156 [patent_doc_number] => 11056407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Semiconductor chips including through electrodes and methods of testing the through electrodes [patent_app_type] => utility [patent_app_number] => 16/540661 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11108 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16774058 [patent_doc_number] => 10985179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Memory arrays and methods used in forming a memory array comprising strings of memory cells and operative through-array-vias [patent_app_type] => utility [patent_app_number] => 16/532019 [patent_app_country] => US [patent_app_date] => 2019-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 90 [patent_figures_cnt] => 130 [patent_no_of_words] => 7198 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16532019 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17557508 [patent_doc_number] => 11314210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Neuromorphic computing using electrostatic mems devices [patent_app_type] => utility [patent_app_number] => 16/526557 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 10758 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16526557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16332037 [patent_doc_number] => 20200303003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => MULTIPLIER-ACCUMULATOR [patent_app_type] => utility [patent_app_number] => 16/769390 [patent_app_country] => US [patent_app_date] => 2019-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16769390 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15153873 [patent_doc_number] => 20190355414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => 1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 16/514031 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17541948 [patent_doc_number] => 11307065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Correction apparatus for angle sensor, and angle sensor [patent_app_type] => utility [patent_app_number] => 16/513051 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 37 [patent_no_of_words] => 13301 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513051 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15327777 [patent_doc_number] => 20200004218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => System and Method for Fail-Safe Provision of an Analog Output Value [patent_app_type] => utility [patent_app_number] => 16/454956 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16454956 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15806927 [patent_doc_number] => 20200126606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/439924 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7975 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439924 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16566639 [patent_doc_number] => 10892013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Two-port ternary content addressable memory and layout pattern thereof, and associated memory device [patent_app_type] => utility [patent_app_number] => 16/439680 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7670 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 351 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439680 [rel_patent_id] =>[rel_patent_doc_number] =>)