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Huedung Xuan Cao Mancuso

Examiner (ID: 153, Phone: (571)272-1939 , Office: P/2845 )

Most Active Art Unit
2821
Art Unit(s)
2772, 2671, 2821, 2845
Total Applications
1508
Issued Applications
1276
Pending Applications
51
Abandoned Applications
190

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20538539 [patent_doc_number] => 12555618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Memory device and computation method thereof [patent_app_type] => utility [patent_app_number] => 18/735522 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735522 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/735522
Memory device and computation method thereof Jun 5, 2024 Issued
Array ( [id] => 19604419 [patent_doc_number] => 20240395299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => OFFSET CANCELLATION [patent_app_type] => utility [patent_app_number] => 18/736326 [patent_app_country] => US [patent_app_date] => 2024-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18736326 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/736326
OFFSET CANCELLATION Jun 5, 2024 Pending
Array ( [id] => 20409768 [patent_doc_number] => 20250378877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => RESISTIVE RANDOM ACCESS MEMORY (RRAM) ARCHITECTURE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/734421 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734421 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734421
Resistive random access memory (RRAM) architecture and method Jun 4, 2024 Issued
Array ( [id] => 20409769 [patent_doc_number] => 20250378878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => VOLTAGE REPLICA CIRCUITS FOR RRAM-BASED CROSSBAR CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/735113 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735113 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/735113
VOLTAGE REPLICA CIRCUITS FOR RRAM-BASED CROSSBAR CIRCUITS Jun 4, 2024 Pending
Array ( [id] => 20409767 [patent_doc_number] => 20250378876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => WORD LINE DRIVER INCLUDING WORD LINE VOLTAGE-CONTROLLED PROTECTION TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/734404 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734404
Word line driver including word line voltage-controlled protection transistor Jun 4, 2024 Issued
Array ( [id] => 20611012 [patent_doc_number] => 12586616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => In-memory computation device for performing a signed mac operation [patent_app_type] => utility [patent_app_number] => 18/731557 [patent_app_country] => US [patent_app_date] => 2024-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 16006 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 527 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18731557 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/731557
In-memory computation device for performing a signed mac operation Jun 2, 2024 Issued
Array ( [id] => 20596289 [patent_doc_number] => 12580012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => Magnetic memory in dual mode and AI memory thereof [patent_app_type] => utility [patent_app_number] => 18/680504 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 3715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680504 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680504
Magnetic memory in dual mode and AI memory thereof May 30, 2024 Issued
Array ( [id] => 20396682 [patent_doc_number] => 20250372157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => RAPID POWER READY SIGNALING IN A MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 18/680911 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680911 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680911
Rapid power ready signaling in a memory array May 30, 2024 Issued
Array ( [id] => 20667382 [patent_doc_number] => 12609162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Page buffer related to performing a program operation, memory device including a page buffer, and method of operating the page buffer [patent_app_type] => utility [patent_app_number] => 18/676044 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5817 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18676044 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/676044
Page buffer related to performing a program operation, memory device including a page buffer, and method of operating the page buffer May 27, 2024 Issued
Array ( [id] => 20611038 [patent_doc_number] => 12586643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/672190 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672190
Memory device and operating method thereof May 22, 2024 Issued
Array ( [id] => 19617235 [patent_doc_number] => 20240402915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => MEMORY CONTROLLER AND MEMORY DATA RECEIVING METHOD [patent_app_type] => utility [patent_app_number] => 18/665545 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4832 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18665545 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/665545
Memory controller and memory data receiving method May 14, 2024 Issued
Array ( [id] => 20018322 [patent_doc_number] => 20250156544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => MEMORY DEVICE AND REFRESH METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/662995 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12386 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662995 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662995
MEMORY DEVICE AND REFRESH METHOD THEREOF May 12, 2024 Pending
Array ( [id] => 20732962 [patent_doc_number] => 12640222 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Enabling or disabling on-die error-correcting code for a memory built-in self-test [patent_app_type] => utility [patent_app_number] => 18/641605 [patent_app_country] => US [patent_app_date] => 2024-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11047 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18641605 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/641605
Enabling or disabling on-die error-correcting code for a memory built-in self-test Apr 21, 2024 Issued
Array ( [id] => 20851845 [patent_doc_number] => 12688884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-21 [patent_title] => Variable width memory module supporting enhanced error detection and correction [patent_app_type] => utility [patent_app_number] => 18/634799 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 3145 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18634799 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/634799
VARIABLE WIDTH MEMORY MODULE SUPPORTING ENHANCED ERROR DETECTION AND CORRECTION Apr 11, 2024 Pending
Array ( [id] => 20806033 [patent_doc_number] => 12670945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Apparatuses and methods for tracking word line accesses [patent_app_type] => utility [patent_app_number] => 18/629445 [patent_app_country] => US [patent_app_date] => 2024-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6386 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18629445 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/629445
Apparatuses and methods for tracking word line accesses Apr 7, 2024 Issued
Array ( [id] => 19335334 [patent_doc_number] => 20240249764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => MEMORY WITH PROGRAMMABLE REFRESH ORDER AND STAGGER TIME [patent_app_type] => utility [patent_app_number] => 18/628562 [patent_app_country] => US [patent_app_date] => 2024-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18628562 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/628562
Memory with programmable refresh order and stagger time Apr 4, 2024 Issued
Array ( [id] => 19514281 [patent_doc_number] => 20240345967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SEMICONDUCTOR DEVICE WITH SECURE ACCESS KEY AND ASSOCIATED METHODS AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/626227 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626227 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626227
Semiconductor device with secure access key and associated methods and systems Apr 2, 2024 Issued
Array ( [id] => 19646274 [patent_doc_number] => 20240420794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/624904 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624904 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/624904
NON-VOLATILE MEMORY Apr 1, 2024 Pending
Array ( [id] => 20026926 [patent_doc_number] => 20250165148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => PREDICTION OF DATA RETENTION DEGRADATION OF A NON-VOLATILE MEMORY DEVICE BASED ON A MACHINE LEARNING ALGORITHM [patent_app_type] => utility [patent_app_number] => 18/622866 [patent_app_country] => US [patent_app_date] => 2024-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622866 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/622866
PREDICTION OF DATA RETENTION DEGRADATION OF A NON-VOLATILE MEMORY DEVICE BASED ON A MACHINE LEARNING ALGORITHM Mar 28, 2024 Pending
Array ( [id] => 19926004 [patent_doc_number] => 12300296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Cross-point array refresh scheme [patent_app_type] => utility [patent_app_number] => 18/618754 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 21740 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618754 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618754
Cross-point array refresh scheme Mar 26, 2024 Issued
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