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Huedung Xuan Cao Mancuso

Examiner (ID: 153, Phone: (571)272-1939 , Office: P/2845 )

Most Active Art Unit
2821
Art Unit(s)
2772, 2671, 2821, 2845
Total Applications
1508
Issued Applications
1276
Pending Applications
51
Abandoned Applications
190

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19926029 [patent_doc_number] => 12300321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Tracking operations performed at a memory device [patent_app_type] => utility [patent_app_number] => 18/500712 [patent_app_country] => US [patent_app_date] => 2023-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4803 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18500712 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/500712
Tracking operations performed at a memory device Nov 1, 2023 Issued
Array ( [id] => 19191137 [patent_doc_number] => 20240170050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => 6T-SRAM-BASED DIGITAL COMPUTING-IN-MEMORY CIRCUITS SUPPORTING FLEXIBLE INPUT DIMENSION [patent_app_type] => utility [patent_app_number] => 18/495167 [patent_app_country] => US [patent_app_date] => 2023-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18495167 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/495167
6T-SRAM-based digital computing-in-memory circuits supporting flexible input dimension Oct 25, 2023 Issued
Array ( [id] => 19005741 [patent_doc_number] => 20240069812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => TECHNIQUES FOR TRANSFERRING COMMANDS TO A DYNAMIC RANDOM-ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 18/494707 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494707 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/494707
Techniques for transferring commands to a dynamic random-access memory Oct 24, 2023 Issued
Array ( [id] => 20175722 [patent_doc_number] => 12394475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Memory device and method for adjusting logic states of data strobe signals used by memory device [patent_app_type] => utility [patent_app_number] => 18/382659 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18382659 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/382659
Memory device and method for adjusting logic states of data strobe signals used by memory device Oct 22, 2023 Issued
Array ( [id] => 19507620 [patent_doc_number] => 12119049 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Memory controller performing data training, system-on-chip including the memory controller, and operating method of the memory controller [patent_app_type] => utility [patent_app_number] => 18/490042 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490042 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/490042
Memory controller performing data training, system-on-chip including the memory controller, and operating method of the memory controller Oct 18, 2023 Issued
Array ( [id] => 19765699 [patent_doc_number] => 12223997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Nonvolatile semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/490148 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 11297 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490148 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/490148
Nonvolatile semiconductor memory device Oct 18, 2023 Issued
Array ( [id] => 18957370 [patent_doc_number] => 20240045697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SMART COMPUTE RESISTIVE MEMORY [patent_app_type] => utility [patent_app_number] => 18/488641 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488641 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/488641
SMART COMPUTE RESISTIVE MEMORY Oct 16, 2023 Abandoned
Array ( [id] => 19269079 [patent_doc_number] => 20240212783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => METHOD AND SYSTEM FOR DETECTING MEMORY ERROR, AND DEVICE [patent_app_type] => utility [patent_app_number] => 18/485277 [patent_app_country] => US [patent_app_date] => 2023-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 466 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18485277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/485277
Method and system for detecting memory error, and device Oct 10, 2023 Issued
Array ( [id] => 20215976 [patent_doc_number] => 12412630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Memory device that performs erase operation to preserve data reliability [patent_app_type] => utility [patent_app_number] => 18/378540 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 8277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18378540 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/378540
Memory device that performs erase operation to preserve data reliability Oct 9, 2023 Issued
Array ( [id] => 19175842 [patent_doc_number] => 20240161816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => VOLTAGE REGULATOR, MEMORY DEVICE INCLUDING VOLTAGE REGULATOR, AND OPERATION METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/377751 [patent_app_country] => US [patent_app_date] => 2023-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377751 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/377751
VOLTAGE REGULATOR, MEMORY DEVICE INCLUDING VOLTAGE REGULATOR, AND OPERATION METHOD OF MEMORY DEVICE Oct 5, 2023 Issued
Array ( [id] => 20305190 [patent_doc_number] => 12451186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Multi-step programming schemes for programming crossbar circuits [patent_app_type] => utility [patent_app_number] => 18/479953 [patent_app_country] => US [patent_app_date] => 2023-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2408 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18479953 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/479953
Multi-step programming schemes for programming crossbar circuits Oct 2, 2023 Issued
Array ( [id] => 20469230 [patent_doc_number] => 12525272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Systems and methods for scan chain interface for non-volatile storage bits [patent_app_type] => utility [patent_app_number] => 18/478643 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4751 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478643 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/478643
Systems and methods for scan chain interface for non-volatile storage bits Sep 28, 2023 Issued
Array ( [id] => 18925519 [patent_doc_number] => 20240028523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM [patent_app_type] => utility [patent_app_number] => 18/477674 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 95354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18477674 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/477674
Atomic compare and swap in a coherent cache system Sep 28, 2023 Issued
Array ( [id] => 18905776 [patent_doc_number] => 20240021261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => BUILT-IN-SELF-TEST LOGIC, MEMORY DEVICE WITH SAME, AND MEMORY MODULE TESTING METHOD [patent_app_type] => utility [patent_app_number] => 18/475968 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18475968 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/475968
Built-in-self-test logic, memory device with same, and memory module testing method Sep 26, 2023 Issued
Array ( [id] => 19803741 [patent_doc_number] => 20250069666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => One Time Programmable Memory Cell [patent_app_type] => utility [patent_app_number] => 18/368691 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3228 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368691 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/368691
One time programmable memory cell Sep 14, 2023 Issued
Array ( [id] => 19842558 [patent_doc_number] => 12254957 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Refresh and access modes for memory [patent_app_type] => utility [patent_app_number] => 18/459779 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459779 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/459779
Refresh and access modes for memory Aug 31, 2023 Issued
Array ( [id] => 19364271 [patent_doc_number] => 20240266305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 18/240576 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18240576 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/240576
Semiconductor module Aug 30, 2023 Issued
Array ( [id] => 18809794 [patent_doc_number] => 20230384129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => CORRECTION APPARATUS FOR ANGLE SENSOR, AND ANGLE SENSOR [patent_app_type] => utility [patent_app_number] => 18/233474 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 404 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233474 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/233474
Correction apparatus for angle sensor, and angle sensor Aug 13, 2023 Issued
Array ( [id] => 18811287 [patent_doc_number] => 20230385623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHOD AND APPARATUS FOR DEFECT-TOLERANT MEMORY-BASED ARTIFICIAL NEURAL NETWORK [patent_app_type] => utility [patent_app_number] => 18/231769 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15391 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231769 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231769
Method and apparatus for defect-tolerant memory-based artificial neural network Aug 7, 2023 Issued
Array ( [id] => 19239391 [patent_doc_number] => 20240196587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => METHOD OF FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/229762 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18229762 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/229762
Method of fabricating semiconductor device Aug 2, 2023 Issued
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