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Huedung Xuan Cao Mancuso

Examiner (ID: 153, Phone: (571)272-1939 , Office: P/2845 )

Most Active Art Unit
2821
Art Unit(s)
2772, 2671, 2821, 2845
Total Applications
1508
Issued Applications
1276
Pending Applications
51
Abandoned Applications
190

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19413321 [patent_doc_number] => 12079137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Banked memory architecture for multiple parallel datapath channels in an accelerator [patent_app_type] => utility [patent_app_number] => 18/203527 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11234 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203527 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/203527
Banked memory architecture for multiple parallel datapath channels in an accelerator May 29, 2023 Issued
Array ( [id] => 19531506 [patent_doc_number] => 20240355408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => CONTENT ADDRESSABLE MEMORY AND CONTENT ADDRESSABLE MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/323430 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8692 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18323430 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/323430
Content addressable memory and content addressable memory cell May 24, 2023 Issued
Array ( [id] => 19951058 [patent_doc_number] => 12322428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => SOT-MRAM with shared selector [patent_app_type] => utility [patent_app_number] => 18/321196 [patent_app_country] => US [patent_app_date] => 2023-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 53 [patent_no_of_words] => 11602 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18321196 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/321196
SOT-MRAM with shared selector May 21, 2023 Issued
Array ( [id] => 19205892 [patent_doc_number] => 20240177791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF TESTING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/320088 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18320088 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/320088
Semiconductor device and method of testing the semiconductor device May 17, 2023 Issued
Array ( [id] => 18631493 [patent_doc_number] => 20230290395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => INTEGRATED CIRCUIT WITH ASYMMETRIC ARRANGEMENTS OF MEMORY ARRAYS [patent_app_type] => utility [patent_app_number] => 18/319969 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319969 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/319969
Integrated circuit with asymmetric arrangements of memory arrays May 17, 2023 Issued
Array ( [id] => 18789054 [patent_doc_number] => 20230377667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/319584 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319584 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/319584
Semiconductor device May 17, 2023 Issued
Array ( [id] => 19475554 [patent_doc_number] => 12105644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Semiconductor device with secure access key and associated methods and systems [patent_app_type] => utility [patent_app_number] => 18/198782 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 17751 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18198782 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/198782
Semiconductor device with secure access key and associated methods and systems May 16, 2023 Issued
Array ( [id] => 19116119 [patent_doc_number] => 20240127869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => STORAGE DEVICES HAVING MULTI DROP STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/317344 [patent_app_country] => US [patent_app_date] => 2023-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18317344 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/317344
Storage devices having multi drop structure May 14, 2023 Issued
Array ( [id] => 18615541 [patent_doc_number] => 20230282278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => MEMORY CIRCUIT AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/316442 [patent_app_country] => US [patent_app_date] => 2023-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18316442 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/316442
Memory circuit and method of operating the same May 11, 2023 Issued
Array ( [id] => 20345811 [patent_doc_number] => 12469546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Memory array seasoning [patent_app_type] => utility [patent_app_number] => 18/196268 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 9700 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18196268 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/196268
Memory array seasoning May 10, 2023 Issued
Array ( [id] => 20274665 [patent_doc_number] => 12444449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Output block for array of non-volatile memory cells [patent_app_type] => utility [patent_app_number] => 18/195322 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 64 [patent_no_of_words] => 17408 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195322 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195322
Output block for array of non-volatile memory cells May 8, 2023 Issued
Array ( [id] => 19205851 [patent_doc_number] => 20240177750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/144531 [patent_app_country] => US [patent_app_date] => 2023-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18144531 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/144531
Semiconductor memory device and operation method thereof May 7, 2023 Issued
Array ( [id] => 18743095 [patent_doc_number] => 20230352083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => PSEUDO-STATIC RANDOM-ACCESS MEMORY AND READING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/306249 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18306249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/306249
Pseudo-static random-access memory and reading method thereof Apr 24, 2023 Issued
Array ( [id] => 19796082 [patent_doc_number] => 12237047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Method of reading data from self-selecting memory, self-selecting memory performing the same and method of operating self-selecting memory using the same [patent_app_type] => utility [patent_app_number] => 18/303937 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 47 [patent_no_of_words] => 10951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18303937 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/303937
Method of reading data from self-selecting memory, self-selecting memory performing the same and method of operating self-selecting memory using the same Apr 19, 2023 Issued
Array ( [id] => 19964630 [patent_doc_number] => 12334145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Bitcell supporting bit-write-mask function [patent_app_type] => utility [patent_app_number] => 18/301876 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/301876
Bitcell supporting bit-write-mask function Apr 16, 2023 Issued
Array ( [id] => 19812189 [patent_doc_number] => 12243597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Memory device and program operation thereof [patent_app_type] => utility [patent_app_number] => 18/132802 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 11097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18132802 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/132802
Memory device and program operation thereof Apr 9, 2023 Issued
Array ( [id] => 19321211 [patent_doc_number] => 20240242757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => UNIVERSAL MEMORY FOR IN-MEMORY COMPUTING AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/297055 [patent_app_country] => US [patent_app_date] => 2023-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18297055 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/297055
Universal memory for in-memory computing and operation method thereof Apr 6, 2023 Issued
Array ( [id] => 18532999 [patent_doc_number] => 20230238074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => ECC BUFFER REDUCTION IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/295130 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295130 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295130
ECC buffer reduction in a memory device Apr 2, 2023 Issued
Array ( [id] => 19582339 [patent_doc_number] => 12148465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Method of operating an integrated circuit and integrated circuit [patent_app_type] => utility [patent_app_number] => 18/295154 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 17617 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295154 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295154
Method of operating an integrated circuit and integrated circuit Apr 2, 2023 Issued
Array ( [id] => 18712555 [patent_doc_number] => 20230335188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => MEMORY MODULE WITH IMPROVED TIMING ADAPTIVITY OF SENSING AMPLIFICATION [patent_app_type] => utility [patent_app_number] => 18/129196 [patent_app_country] => US [patent_app_date] => 2023-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7639 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18129196 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/129196
Memory module with improved timing adaptivity of sensing amplification Mar 30, 2023 Issued
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