Search

Hung K. Vu

Examiner (ID: 9736)

Most Active Art Unit
2897
Art Unit(s)
2811, 2897
Total Applications
1874
Issued Applications
1571
Pending Applications
97
Abandoned Applications
237

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18081084 [patent_doc_number] => 20220406696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => PACKAGE SUBSTRATE WITH GLASS CORE HAVING VERTICAL POWER PLANES FOR IMPROVED POWER DELIVERY [patent_app_type] => utility [patent_app_number] => 17/349697 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349697 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349697
Package substrate with glass core having vertical power planes for improved power delivery Jun 15, 2021 Issued
Array ( [id] => 19153797 [patent_doc_number] => 11978720 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Semiconductor device package and methods of manufacture [patent_app_type] => utility [patent_app_number] => 17/347871 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 37 [patent_no_of_words] => 12870 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347871 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/347871
Semiconductor device package and methods of manufacture Jun 14, 2021 Issued
Array ( [id] => 18935480 [patent_doc_number] => 11887923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Wiring design method, wiring structure, and flip chip [patent_app_type] => utility [patent_app_number] => 17/640752 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9557 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17640752 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/640752
Wiring design method, wiring structure, and flip chip Jun 9, 2021 Issued
Array ( [id] => 17115657 [patent_doc_number] => 20210296254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/338787 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338787 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338787
Semiconductor device Jun 3, 2021 Issued
Array ( [id] => 19733850 [patent_doc_number] => 12211852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Semiconductor structure with a second isolation dam and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/604991 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 6712 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 479 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17604991 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/604991
Semiconductor structure with a second isolation dam and manufacturing method thereof Jun 1, 2021 Issued
Array ( [id] => 17115926 [patent_doc_number] => 20210296523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => PHOTODETECTOR AND METHOD OF MANUFACTURE [patent_app_type] => utility [patent_app_number] => 17/336928 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -46 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336928 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/336928
PHOTODETECTOR AND METHOD OF MANUFACTURE Jun 1, 2021 Abandoned
Array ( [id] => 19414816 [patent_doc_number] => 12080653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Formation method of chip package with fan-out structure [patent_app_type] => utility [patent_app_number] => 17/328925 [patent_app_country] => US [patent_app_date] => 2021-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6513 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328925 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/328925
Formation method of chip package with fan-out structure May 23, 2021 Issued
Array ( [id] => 18251075 [patent_doc_number] => 20230078114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => LIGHT-EMITTING DIODE DEVICE AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/802564 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17802564 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/802564
LIGHT-EMITTING DIODE DEVICE AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL May 20, 2021 Pending
Array ( [id] => 18105647 [patent_doc_number] => 11545547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Method of forming semiconductor device [patent_app_type] => utility [patent_app_number] => 17/317912 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5119 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317912 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/317912
Method of forming semiconductor device May 11, 2021 Issued
Array ( [id] => 17287769 [patent_doc_number] => 11204313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Throughput-scalable analytical system using transmembrane pore sensors [patent_app_type] => utility [patent_app_number] => 17/246414 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 27 [patent_no_of_words] => 23100 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17246414 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/246414
Throughput-scalable analytical system using transmembrane pore sensors Apr 29, 2021 Issued
Array ( [id] => 16995413 [patent_doc_number] => 20210233833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => Semiconductor Device and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 17/228018 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228018 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228018
Semiconductor device and method of manufacture Apr 11, 2021 Issued
Array ( [id] => 17676698 [patent_doc_number] => 20220189865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => PRINTED CIRCUIT BOARD AND ELECTRONIC COMPONENT PACKAGE [patent_app_type] => utility [patent_app_number] => 17/227860 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227860 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/227860
Printed circuit board and electronic component package Apr 11, 2021 Issued
Array ( [id] => 17933250 [patent_doc_number] => 20220328376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => Three Dimensional IC Package with Thermal Enhancement [patent_app_type] => utility [patent_app_number] => 17/226177 [patent_app_country] => US [patent_app_date] => 2021-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17226177 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/226177
Three dimensional IC package with thermal enhancement Apr 8, 2021 Issued
Array ( [id] => 18105525 [patent_doc_number] => 11545422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Fan-out semiconductor package including under-bump metallurgy [patent_app_type] => utility [patent_app_number] => 17/225178 [patent_app_country] => US [patent_app_date] => 2021-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 13550 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225178 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/225178
Fan-out semiconductor package including under-bump metallurgy Apr 7, 2021 Issued
Array ( [id] => 18292423 [patent_doc_number] => 11621296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Magnetoresistive random access memory and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 17/223024 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2883 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223024
Magnetoresistive random access memory and method for fabricating the same Apr 5, 2021 Issued
Array ( [id] => 18016342 [patent_doc_number] => 11508649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Semiconductor package including substrate with outer insulating layer [patent_app_type] => utility [patent_app_number] => 17/222912 [patent_app_country] => US [patent_app_date] => 2021-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 7061 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222912 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/222912
Semiconductor package including substrate with outer insulating layer Apr 4, 2021 Issued
Array ( [id] => 18331827 [patent_doc_number] => 11637083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Flip-chip package assembly [patent_app_type] => utility [patent_app_number] => 17/219453 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 7719 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219453 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219453
Flip-chip package assembly Mar 30, 2021 Issued
Array ( [id] => 18304456 [patent_doc_number] => 11626370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Interconnection structure of a semiconductor chip and semiconductor package including the interconnection structure [patent_app_type] => utility [patent_app_number] => 17/213025 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 8443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17213025 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/213025
Interconnection structure of a semiconductor chip and semiconductor package including the interconnection structure Mar 24, 2021 Issued
Array ( [id] => 16981404 [patent_doc_number] => 20210225641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => QUANTUM DOTS AND PRODUCTION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/187930 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17187930 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/187930
Quantum dots and production method thereof Feb 28, 2021 Issued
Array ( [id] => 17463822 [patent_doc_number] => 20220077128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/184837 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184837 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184837
Semiconductor storage device Feb 24, 2021 Issued
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