Search

Hung K. Vu

Examiner (ID: 9736)

Most Active Art Unit
2897
Art Unit(s)
2811, 2897
Total Applications
1874
Issued Applications
1571
Pending Applications
97
Abandoned Applications
237

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17623187 [patent_doc_number] => 11342251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Isolated component design [patent_app_type] => utility [patent_app_number] => 17/015059 [patent_app_country] => US [patent_app_date] => 2020-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5873 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17015059 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/015059
Isolated component design Sep 7, 2020 Issued
Array ( [id] => 17464020 [patent_doc_number] => 20220077326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/013350 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17013350 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/013350
Package structure and method for manufacturing the same Sep 3, 2020 Issued
Array ( [id] => 17174166 [patent_doc_number] => 20210327837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING RESISTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 17/007059 [patent_app_country] => US [patent_app_date] => 2020-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17007059 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/007059
Semiconductor device including resistor element Aug 30, 2020 Issued
Array ( [id] => 16529102 [patent_doc_number] => 20200403183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => PROTECTIVE FILM, DISPLAY MODULE, DISPLAY DEVICE, METHOD OF MANUFACTURING DISPLAY MODULE, AND METHOD OF MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/007111 [patent_app_country] => US [patent_app_date] => 2020-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17007111 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/007111
Protective film, display module, display device, method of manufacturing display module, and method of manufacturing display device Aug 30, 2020 Issued
Array ( [id] => 16509270 [patent_doc_number] => 20200388526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => Semiconductor Device Structures [patent_app_type] => utility [patent_app_number] => 17/001189 [patent_app_country] => US [patent_app_date] => 2020-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17001189 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/001189
Semiconductor device structures Aug 23, 2020 Issued
Array ( [id] => 17431780 [patent_doc_number] => 20220059489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => SOLDER JOINTS ON NICKEL SURFACE FINISHES WITHOUT GOLD PLATING [patent_app_type] => utility [patent_app_number] => 17/000966 [patent_app_country] => US [patent_app_date] => 2020-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3294 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000966 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/000966
Solder joints on nickel surface finishes without gold plating Aug 23, 2020 Issued
Array ( [id] => 17956336 [patent_doc_number] => 11482449 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-25 [patent_title] => Electrical component with a dielectric passivation stack [patent_app_type] => utility [patent_app_number] => 16/983380 [patent_app_country] => US [patent_app_date] => 2020-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4824 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16983380 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/983380
Electrical component with a dielectric passivation stack Aug 2, 2020 Issued
Array ( [id] => 16456110 [patent_doc_number] => 20200365536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => ANTENNA MODULE [patent_app_type] => utility [patent_app_number] => 16/983771 [patent_app_country] => US [patent_app_date] => 2020-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16983771 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/983771
Antenna module Aug 2, 2020 Issued
Array ( [id] => 17188814 [patent_doc_number] => 20210335699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => Bump Joint Structure with Distortion and Method Forming Same [patent_app_type] => utility [patent_app_number] => 16/942141 [patent_app_country] => US [patent_app_date] => 2020-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16942141 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/942141
Bump joint structure with distortion and method forming same Jul 28, 2020 Issued
Array ( [id] => 17530035 [patent_doc_number] => 11302736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Imaging device and electronic device [patent_app_type] => utility [patent_app_number] => 16/940458 [patent_app_country] => US [patent_app_date] => 2020-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 37 [patent_no_of_words] => 17076 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16940458 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/940458
Imaging device and electronic device Jul 27, 2020 Issued
Array ( [id] => 19487340 [patent_doc_number] => 12107065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Uniform chip gaps via injection-molded solder pillars [patent_app_type] => utility [patent_app_number] => 16/932290 [patent_app_country] => US [patent_app_date] => 2020-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 21799 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16932290 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/932290
Uniform chip gaps via injection-molded solder pillars Jul 16, 2020 Issued
Array ( [id] => 18000945 [patent_doc_number] => 11502056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Joint structure in semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/924147 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 20511 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924147 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/924147
Joint structure in semiconductor package and manufacturing method thereof Jul 7, 2020 Issued
Array ( [id] => 16394440 [patent_doc_number] => 20200335381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => MULTI-LEVEL MICRO-DEVICE TETHERS [patent_app_type] => utility [patent_app_number] => 16/921556 [patent_app_country] => US [patent_app_date] => 2020-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921556 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/921556
Multi-level micro-device tethers Jul 5, 2020 Issued
Array ( [id] => 19936783 [patent_doc_number] => 12310003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Semiconductor device and method of making the same [patent_app_type] => utility [patent_app_number] => 17/593829 [patent_app_country] => US [patent_app_date] => 2020-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17593829 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/593829
Semiconductor device and method of making the same Jun 18, 2020 Issued
Array ( [id] => 16873573 [patent_doc_number] => 20210167040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 16/906051 [patent_app_country] => US [patent_app_date] => 2020-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16906051 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/906051
Semiconductor package Jun 18, 2020 Issued
Array ( [id] => 17303106 [patent_doc_number] => 20210398945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES AND ELECTRONIC SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/905747 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905747 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/905747
Microelectronic devices including source structures overlying stack structures, and related electronic systems Jun 17, 2020 Issued
Array ( [id] => 16364530 [patent_doc_number] => 20200321281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => MULTI-CHIP PACKAGE WITH HIGH DENSITY INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 16/904363 [patent_app_country] => US [patent_app_date] => 2020-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16904363 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/904363
Multi-chip package with high density interconnects Jun 16, 2020 Issued
Array ( [id] => 16348165 [patent_doc_number] => 20200312816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => INTEGRATED CIRCUIT PACKAGE AND METHOD OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 16/901643 [patent_app_country] => US [patent_app_date] => 2020-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21830 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16901643 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/901643
Integrated circuit package having heat dissipation structure Jun 14, 2020 Issued
Array ( [id] => 16545010 [patent_doc_number] => 20200411425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/893650 [patent_app_country] => US [patent_app_date] => 2020-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15166 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893650 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/893650
Semiconductor device Jun 4, 2020 Issued
Array ( [id] => 17607142 [patent_doc_number] => 11335634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Chip package structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/893467 [patent_app_country] => US [patent_app_date] => 2020-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 8397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893467 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/893467
Chip package structure and method for forming the same Jun 4, 2020 Issued
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