Search

Hung K. Vu

Examiner (ID: 17056, Phone: (571)272-1666 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2811
Total Applications
1933
Issued Applications
1601
Pending Applications
110
Abandoned Applications
241

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18688393 [patent_doc_number] => 11784137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Semiconductor device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 17/151787 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 9683 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17151787 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/151787
Semiconductor device and method for fabricating the same Jan 18, 2021 Issued
Array ( [id] => 16796165 [patent_doc_number] => 20210125982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/142663 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142663 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142663
Semiconductor device Jan 5, 2021 Issued
Array ( [id] => 18874782 [patent_doc_number] => 11862605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Integrated circuit package and method of forming same [patent_app_type] => utility [patent_app_number] => 17/140860 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 63 [patent_figures_cnt] => 69 [patent_no_of_words] => 21922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140860 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/140860
Integrated circuit package and method of forming same Jan 3, 2021 Issued
Array ( [id] => 16796314 [patent_doc_number] => 20210126131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => METHOD OF FORMING OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/140114 [patent_app_country] => US [patent_app_date] => 2021-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140114 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/140114
Method of forming oxide semiconductor field effect transistor Jan 2, 2021 Issued
Array ( [id] => 17346286 [patent_doc_number] => 20220012617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => QUANTUM COMPUTING CIRCUIT COMPRISING A PLURALITY OF CHIPS AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/139715 [patent_app_country] => US [patent_app_date] => 2020-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6718 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17139715 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/139715
QUANTUM COMPUTING CIRCUIT COMPRISING A PLURALITY OF CHIPS AND METHOD FOR MANUFACTURING THE SAME Dec 30, 2020 Pending
Array ( [id] => 16951737 [patent_doc_number] => 20210210429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => FLIP-CHIP SEMICONDUCTOR-ON-INSULATOR TRANSISTOR LAYOUT [patent_app_type] => utility [patent_app_number] => 17/138613 [patent_app_country] => US [patent_app_date] => 2020-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17138613 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/138613
Flip-chip semiconductor-on-insulator transistor layout Dec 29, 2020 Issued
Array ( [id] => 17708646 [patent_doc_number] => 20220208654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => POWER MODULE AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 17/136340 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136340 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136340
Power module and related methods Dec 28, 2020 Issued
Array ( [id] => 17559292 [patent_doc_number] => 11316015 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Silicon germanium FinFET with low gate induced drain leakage current [patent_app_type] => utility [patent_app_number] => 17/134731 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7575 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134731 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/134731
Silicon germanium FinFET with low gate induced drain leakage current Dec 27, 2020 Issued
Array ( [id] => 17731006 [patent_doc_number] => 11387408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Magnetoresistive random access memory and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/131767 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3199 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131767 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131767
Magnetoresistive random access memory and method of manufacturing the same Dec 22, 2020 Issued
Array ( [id] => 16731473 [patent_doc_number] => 20210098621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/122421 [patent_app_country] => US [patent_app_date] => 2020-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17122421 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/122421
Semiconductor device Dec 14, 2020 Issued
Array ( [id] => 16920532 [patent_doc_number] => 20210193624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => Apparatus For Non-Volatile Random Access Memory Stacks [patent_app_type] => utility [patent_app_number] => 17/122149 [patent_app_country] => US [patent_app_date] => 2020-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17122149 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/122149
Apparatus for non-volatile random access memory stacks Dec 14, 2020 Issued
Array ( [id] => 18219470 [patent_doc_number] => 11594419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Reduction of line wiggling [patent_app_type] => utility [patent_app_number] => 17/113734 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7133 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17113734 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/113734
Reduction of line wiggling Dec 6, 2020 Issued
Array ( [id] => 17645224 [patent_doc_number] => 20220172963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => SEMI-EMBEDDED TRACE STRUCTURE WITH PARTIALLY BURIED TRACES [patent_app_type] => utility [patent_app_number] => 17/107512 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4618 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107512 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107512
Semi-embedded trace structure with partially buried traces Nov 29, 2020 Issued
Array ( [id] => 16828077 [patent_doc_number] => 20210143370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/106719 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13014 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17106719 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/106719
Display panel Nov 29, 2020 Issued
Array ( [id] => 20188218 [patent_doc_number] => 12399328 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Automated fiber optic interconnection system based on non repeating braid algorithm, robot, and fixed, identical length optical fibers [patent_app_type] => utility [patent_app_number] => 17/100830 [patent_app_country] => US [patent_app_date] => 2020-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1882 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17100830 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/100830
Automated fiber optic interconnection system based on non repeating braid algorithm, robot, and fixed, identical length optical fibers Nov 20, 2020 Issued
Array ( [id] => 18140805 [patent_doc_number] => 20230014646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SEMICONDUCTOR ELEMENT AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 17/781912 [patent_app_country] => US [patent_app_date] => 2020-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17781912 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/781912
SEMICONDUCTOR ELEMENT AND ELECTRONIC APPARATUS Nov 18, 2020 Abandoned
Array ( [id] => 19328856 [patent_doc_number] => 12046545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Hybrid reconstituted substrate for electronic packaging [patent_app_type] => utility [patent_app_number] => 17/093090 [patent_app_country] => US [patent_app_date] => 2020-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3415 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17093090 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/093090
Hybrid reconstituted substrate for electronic packaging Nov 8, 2020 Issued
Array ( [id] => 17599415 [patent_doc_number] => 20220148989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => SEMICONDUCTOR PACKAGES [patent_app_type] => utility [patent_app_number] => 17/092195 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17092195 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/092195
Semiconductor packages Nov 5, 2020 Issued
Array ( [id] => 16776111 [patent_doc_number] => 20210113188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => VERTICAL PACKAGING FOR ULTRASOUND-ON-A-CHIP AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 17/088336 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088336 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/088336
Vertical packaging for ultrasound-on-a-chip and related methods Nov 2, 2020 Issued
Array ( [id] => 20668838 [patent_doc_number] => 12610629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-21 [patent_title] => Charged-particle detector package for high speed applications [patent_app_type] => utility [patent_app_number] => 17/774130 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 32 [patent_no_of_words] => 10274 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17774130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/774130
Charged-particle detector package for high speed applications Oct 29, 2020 Issued
Menu