
Hung K. Vu
Examiner (ID: 9736)
| Most Active Art Unit | 2897 |
| Art Unit(s) | 2811, 2897 |
| Total Applications | 1874 |
| Issued Applications | 1571 |
| Pending Applications | 97 |
| Abandoned Applications | 237 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15503697
[patent_doc_number] => 20200052037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-13
[patent_title] => RRAM CELLS IN CROSSBAR ARRAY ARCHITECTURE
[patent_app_type] => utility
[patent_app_number] => 16/058374
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5773
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058374
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058374 | RRAM cells in crossbar array architecture | Aug 7, 2018 | Issued |
Array
(
[id] => 16132565
[patent_doc_number] => 10700050
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-06-30
[patent_title] => Method of manufacturing power semiconductor module including a power semiconductor chip and a control chip formed according to different process rules, and power semiconductor module
[patent_app_type] => utility
[patent_app_number] => 16/057860
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4028
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16057860
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/057860 | Method of manufacturing power semiconductor module including a power semiconductor chip and a control chip formed according to different process rules, and power semiconductor module | Aug 7, 2018 | Issued |
Array
(
[id] => 15250441
[patent_doc_number] => 10510749
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-12-17
[patent_title] => Resistor within single diffusion break, and related method
[patent_app_type] => utility
[patent_app_number] => 16/057881
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 27
[patent_no_of_words] => 5181
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16057881
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/057881 | Resistor within single diffusion break, and related method | Aug 7, 2018 | Issued |
Array
(
[id] => 14738657
[patent_doc_number] => 10388739
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-20
[patent_title] => Thin-film transistor including two-dimensional semiconductor and display apparatus including the same
[patent_app_type] => utility
[patent_app_number] => 16/058156
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 16
[patent_no_of_words] => 11635
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058156
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058156 | Thin-film transistor including two-dimensional semiconductor and display apparatus including the same | Aug 7, 2018 | Issued |
Array
(
[id] => 14587867
[patent_doc_number] => 20190221542
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-18
[patent_title] => SEMICONDUCTOR PACKAGES INCLUDING CHIP STACKS
[patent_app_type] => utility
[patent_app_number] => 16/058549
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6754
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058549
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058549 | Semiconductor packages including chip stacks | Aug 7, 2018 | Issued |
Array
(
[id] => 17047968
[patent_doc_number] => 11101158
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-08-24
[patent_title] => Wafer-scale membrane release laminates, devices and processes
[patent_app_type] => utility
[patent_app_number] => 16/058192
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 3419
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 294
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058192
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058192 | Wafer-scale membrane release laminates, devices and processes | Aug 7, 2018 | Issued |
Array
(
[id] => 13936155
[patent_doc_number] => 20190051593
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-14
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/058405
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8979
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058405
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058405 | DISPLAY DEVICE | Aug 7, 2018 | Abandoned |
Array
(
[id] => 14904979
[patent_doc_number] => 20190296255
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-26
[patent_title] => ELECTROLUMINESCENT DEVICE AND DISPLAY DEVICE COMPRISING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/058176
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10206
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058176
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058176 | Electroluminescent device and display device comprising the same | Aug 7, 2018 | Issued |
Array
(
[id] => 15857381
[patent_doc_number] => 10643989
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-05
[patent_title] => Electrostatic discharge protection apparatus having at least one junction and method for operating the same
[patent_app_type] => utility
[patent_app_number] => 16/057872
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4957
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16057872
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/057872 | Electrostatic discharge protection apparatus having at least one junction and method for operating the same | Aug 7, 2018 | Issued |
Array
(
[id] => 15250613
[patent_doc_number] => 10510836
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-12-17
[patent_title] => Gate trench device with oxygen inserted si-layers
[patent_app_type] => utility
[patent_app_number] => 16/058544
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4878
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058544
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058544 | Gate trench device with oxygen inserted si-layers | Aug 7, 2018 | Issued |
Array
(
[id] => 15922179
[patent_doc_number] => 10658338
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-19
[patent_title] => Semiconductor device including a re-interconnection layer and method for manufacturing same
[patent_app_type] => utility
[patent_app_number] => 16/058161
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 18
[patent_no_of_words] => 3710
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058161
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058161 | Semiconductor device including a re-interconnection layer and method for manufacturing same | Aug 7, 2018 | Issued |
Array
(
[id] => 14350385
[patent_doc_number] => 20190157165
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-23
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/058291
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7880
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058291
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058291 | Semiconductor device | Aug 7, 2018 | Issued |
Array
(
[id] => 15503829
[patent_doc_number] => 20200052103
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-13
[patent_title] => HIGH POWER PERFORMANCE GALLIUM NITRIDE HIGH ELECTRON MOBILITY TRANSISTOR WITH LEDGES AND FIELD PLATES
[patent_app_type] => utility
[patent_app_number] => 16/058388
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3896
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058388
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058388 | High power performance gallium nitride high electron mobility transistor with ledges and field plates | Aug 7, 2018 | Issued |
Array
(
[id] => 15889737
[patent_doc_number] => 10651224
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-12
[patent_title] => Semiconductor package including a redistribution line
[patent_app_type] => utility
[patent_app_number] => 16/058451
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 5500
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058451
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058451 | Semiconductor package including a redistribution line | Aug 7, 2018 | Issued |
Array
(
[id] => 13936073
[patent_doc_number] => 20190051552
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-14
[patent_title] => MULTI-LEVEL MICRO-DEVICE TETHERS
[patent_app_type] => utility
[patent_app_number] => 16/058097
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9115
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058097
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058097 | Multi-level micro-device tethers | Aug 7, 2018 | Issued |
Array
(
[id] => 14558359
[patent_doc_number] => 10347650
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2019-07-09
[patent_title] => Semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 16/058210
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 38
[patent_no_of_words] => 11195
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058210
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058210 | Semiconductor memory device | Aug 7, 2018 | Issued |
Array
(
[id] => 16645549
[patent_doc_number] => 10923416
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-16
[patent_title] => Interconnect structure with insulation layer and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 16/058290
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 7421
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058290
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058290 | Interconnect structure with insulation layer and method of forming the same | Aug 7, 2018 | Issued |
Array
(
[id] => 15503357
[patent_doc_number] => 20200051867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-13
[patent_title] => FIN STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 16/058494
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2607
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058494
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058494 | Fin structures | Aug 7, 2018 | Issued |
Array
(
[id] => 16609468
[patent_doc_number] => 10910484
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-02
[patent_title] => Bipolar transistor semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/058123
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 26
[patent_no_of_words] => 9379
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058123
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058123 | Bipolar transistor semiconductor device | Aug 7, 2018 | Issued |
Array
(
[id] => 15504037
[patent_doc_number] => 20200052207
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-13
[patent_title] => RESISTIVE SWITCHING MEMORY WITH REPLACEMENT METAL ELECTRODE
[patent_app_type] => utility
[patent_app_number] => 16/058428
[patent_app_country] => US
[patent_app_date] => 2018-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5521
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16058428
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/058428 | Resistive switching memory with replacement metal electrode | Aug 7, 2018 | Issued |