
Hung T. Nguyen
Examiner (ID: 15433, Phone: (571)272-2982 , Office: P/2682 )
| Most Active Art Unit | 2612 |
| Art Unit(s) | 2681, 2632, 2683, 2612, 2736, 2682, 2636, 2686, 2831 |
| Total Applications | 1638 |
| Issued Applications | 1316 |
| Pending Applications | 51 |
| Abandoned Applications | 276 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4862318
[patent_doc_number] => 20080270816
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'Portable data storage apparatus and synchronization method for the same'
[patent_app_type] => utility
[patent_app_number] => 11/790318
[patent_app_country] => US
[patent_app_date] => 2007-04-25
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[pdf_file] => publications/A1/0270/20080270816.pdf
[firstpage_image] =>[orig_patent_app_number] => 11790318
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/790318 | Portable data storage apparatus and synchronization method for the same | Apr 24, 2007 | Abandoned |
Array
(
[id] => 4895333
[patent_doc_number] => 20080104433
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[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'System on a chip with RTC power supply'
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[patent_app_number] => 11/789763
[patent_app_country] => US
[patent_app_date] => 2007-04-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/789763 | System on a chip with RTC power supply | Apr 24, 2007 | Issued |
Array
(
[id] => 4895334
[patent_doc_number] => 20080104434
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[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'SOC with low power and performance modes'
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[patent_app_number] => 11/789760
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[patent_app_date] => 2007-04-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/789760 | SOC with low power and performance modes | Apr 24, 2007 | Issued |
Array
(
[id] => 9254
[patent_doc_number] => 07814356
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[patent_kind] => B2
[patent_issue_date] => 2010-10-12
[patent_title] => 'Apparatus and control method for initializing a phase adjusting part in response to a power supply cut signal'
[patent_app_type] => utility
[patent_app_number] => 11/790260
[patent_app_country] => US
[patent_app_date] => 2007-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/07/814/07814356.pdf
[firstpage_image] =>[orig_patent_app_number] => 11790260
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/790260 | Apparatus and control method for initializing a phase adjusting part in response to a power supply cut signal | Apr 23, 2007 | Issued |
Array
(
[id] => 68978
[patent_doc_number] => 07761721
[patent_country] => US
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[patent_issue_date] => 2010-07-20
[patent_title] => 'System of integrated environmentally hardened architecture for space application'
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[patent_app_country] => US
[patent_app_date] => 2007-04-12
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[firstpage_image] =>[orig_patent_app_number] => 11734482
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/734482 | System of integrated environmentally hardened architecture for space application | Apr 11, 2007 | Issued |
Array
(
[id] => 4665475
[patent_doc_number] => 20080256382
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[patent_issue_date] => 2008-10-16
[patent_title] => 'METHOD AND SYSTEM FOR DIGITAL FREQUENCY CLOCKING IN PROCESSOR CORES'
[patent_app_type] => utility
[patent_app_number] => 11/734375
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[pdf_file] => publications/A1/0256/20080256382.pdf
[firstpage_image] =>[orig_patent_app_number] => 11734375
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/734375 | Method and system for digital frequency clocking in processor cores | Apr 11, 2007 | Issued |
Array
(
[id] => 9250
[patent_doc_number] => 07814352
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[patent_issue_date] => 2010-10-12
[patent_title] => 'Selective connection of a memory to either a gateway card or information processor based on the power mode'
[patent_app_type] => utility
[patent_app_number] => 11/783786
[patent_app_country] => US
[patent_app_date] => 2007-04-12
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/783786 | Selective connection of a memory to either a gateway card or information processor based on the power mode | Apr 11, 2007 | Issued |
Array
(
[id] => 8120183
[patent_doc_number] => 08161314
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-04-17
[patent_title] => 'Method and system for analog frequency clocking in processor cores'
[patent_app_type] => utility
[patent_app_number] => 11/734334
[patent_app_country] => US
[patent_app_date] => 2007-04-12
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[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/08/161/08161314.pdf
[firstpage_image] =>[orig_patent_app_number] => 11734334
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/734334 | Method and system for analog frequency clocking in processor cores | Apr 11, 2007 | Issued |
Array
(
[id] => 4522371
[patent_doc_number] => 07917741
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-29
[patent_title] => 'Enhancing security of a system via access by an embedded controller to a secure storage device'
[patent_app_type] => utility
[patent_app_number] => 11/733599
[patent_app_country] => US
[patent_app_date] => 2007-04-10
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/733599 | Enhancing security of a system via access by an embedded controller to a secure storage device | Apr 9, 2007 | Issued |
Array
(
[id] => 4470068
[patent_doc_number] => 07882372
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-01
[patent_title] => 'Method and system for controlling and monitoring an array of point-of-load regulators'
[patent_app_type] => utility
[patent_app_number] => 11/696449
[patent_app_country] => US
[patent_app_date] => 2007-04-04
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[patent_drawing_sheets_cnt] => 3
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/696449 | Method and system for controlling and monitoring an array of point-of-load regulators | Apr 3, 2007 | Issued |
Array
(
[id] => 5223859
[patent_doc_number] => 20070253125
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-01
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/730683
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[patent_app_date] => 2007-04-03
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[firstpage_image] =>[orig_patent_app_number] => 11730683
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/730683 | Power control for a plurality of internal power supply circuits of a semiconductor integrated circuit | Apr 2, 2007 | Issued |
Array
(
[id] => 5167133
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[patent_title] => 'Information processing device'
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[firstpage_image] =>[orig_patent_app_number] => 11730198
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Array
(
[id] => 4722408
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[patent_title] => 'Method for not resetting memory while booting computer through hardware booting button thereof'
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Array
(
[id] => 58524
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[patent_title] => 'Using a monitoring process to update system configuration settings during restore operations'
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/678440 | Techniques for operating a processor subsystem to service masked interrupts during a power-down sequence | Feb 22, 2007 | Issued |
Array
(
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[patent_title] => 'ANTICIPATORY POWER MANAGEMENT FOR BATTERY-POWERED ELECTRONIC DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/675979 | Anticipatory power management for battery-powered electronic device | Feb 15, 2007 | Issued |
Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/624201 | Circuit and method for aligning transmitted data by adjusting transmission timing for plurality of lanes | Jan 16, 2007 | Issued |