
Hung T. Nguyen
Examiner (ID: 15433, Phone: (571)272-2982 , Office: P/2682 )
| Most Active Art Unit | 2612 |
| Art Unit(s) | 2681, 2632, 2683, 2612, 2736, 2682, 2636, 2686, 2831 |
| Total Applications | 1638 |
| Issued Applications | 1316 |
| Pending Applications | 51 |
| Abandoned Applications | 276 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 374927
[patent_doc_number] => 07475235
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-01-06
[patent_title] => 'Real-time management of a configuration of a computer system'
[patent_app_type] => utility
[patent_app_number] => 11/153781
[patent_app_country] => US
[patent_app_date] => 2005-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 19
[patent_no_of_words] => 19848
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/475/07475235.pdf
[firstpage_image] =>[orig_patent_app_number] => 11153781
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/153781 | Real-time management of a configuration of a computer system | Jun 14, 2005 | Issued |
Array
(
[id] => 5891988
[patent_doc_number] => 20060277422
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-07
[patent_title] => 'Information handling system including a memory device capable of being powered by a battery'
[patent_app_type] => utility
[patent_app_number] => 11/145249
[patent_app_country] => US
[patent_app_date] => 2005-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3294
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0277/20060277422.pdf
[firstpage_image] =>[orig_patent_app_number] => 11145249
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/145249 | Information handling system including a memory device capable of being powered by a battery | Jun 2, 2005 | Issued |
Array
(
[id] => 5610282
[patent_doc_number] => 20060271798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-30
[patent_title] => 'Configurable interrupt scheme for waking up a system from sleep mode'
[patent_app_type] => utility
[patent_app_number] => 11/141296
[patent_app_country] => US
[patent_app_date] => 2005-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3313
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0271/20060271798.pdf
[firstpage_image] =>[orig_patent_app_number] => 11141296
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/141296 | Configurable interrupt scheme for waking up a system from sleep mode | May 30, 2005 | Abandoned |
Array
(
[id] => 5803541
[patent_doc_number] => 20060036881
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-16
[patent_title] => 'Processor circuitry'
[patent_app_type] => utility
[patent_app_number] => 11/140620
[patent_app_country] => US
[patent_app_date] => 2005-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2624
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0036/20060036881.pdf
[firstpage_image] =>[orig_patent_app_number] => 11140620
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/140620 | Processor circuitry | May 26, 2005 | Abandoned |
Array
(
[id] => 5608657
[patent_doc_number] => 20060270173
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-30
[patent_title] => 'Methods and apparatus for reducing leakage current in a disabled SOI circuit'
[patent_app_type] => utility
[patent_app_number] => 11/137234
[patent_app_country] => US
[patent_app_date] => 2005-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8575
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0270/20060270173.pdf
[firstpage_image] =>[orig_patent_app_number] => 11137234
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/137234 | Methods and apparatus for reducing leakage current in a disabled SOI circuit | May 24, 2005 | Issued |
Array
(
[id] => 598748
[patent_doc_number] => 07447921
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-04
[patent_title] => 'Scalable extensible network test architecture'
[patent_app_type] => utility
[patent_app_number] => 11/133073
[patent_app_country] => US
[patent_app_date] => 2005-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 7051
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/447/07447921.pdf
[firstpage_image] =>[orig_patent_app_number] => 11133073
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/133073 | Scalable extensible network test architecture | May 17, 2005 | Issued |
Array
(
[id] => 7178062
[patent_doc_number] => 20050204179
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-15
[patent_title] => 'Method for controlling power consumption associated with a processor'
[patent_app_type] => utility
[patent_app_number] => 11/123464
[patent_app_country] => US
[patent_app_date] => 2005-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7000
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0204/20050204179.pdf
[firstpage_image] =>[orig_patent_app_number] => 11123464
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/123464 | Method for controlling power consumption associated with a processor | May 5, 2005 | Abandoned |
Array
(
[id] => 261855
[patent_doc_number] => 07574589
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-08-11
[patent_title] => 'Booting intelligent components from a shared resource'
[patent_app_type] => utility
[patent_app_number] => 11/123864
[patent_app_country] => US
[patent_app_date] => 2005-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3799
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/574/07574589.pdf
[firstpage_image] =>[orig_patent_app_number] => 11123864
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/123864 | Booting intelligent components from a shared resource | May 4, 2005 | Issued |
Array
(
[id] => 358544
[patent_doc_number] => 07490253
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-10
[patent_title] => 'Display device with power saving mode based on detected illuminance'
[patent_app_type] => utility
[patent_app_number] => 11/092797
[patent_app_country] => US
[patent_app_date] => 2005-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2858
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/490/07490253.pdf
[firstpage_image] =>[orig_patent_app_number] => 11092797
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/092797 | Display device with power saving mode based on detected illuminance | Mar 29, 2005 | Issued |
Array
(
[id] => 5701642
[patent_doc_number] => 20060218327
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-28
[patent_title] => 'Information handling system including detection of an audio input device'
[patent_app_type] => utility
[patent_app_number] => 11/087967
[patent_app_country] => US
[patent_app_date] => 2005-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2430
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0218/20060218327.pdf
[firstpage_image] =>[orig_patent_app_number] => 11087967
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/087967 | Information handling system including detection of an audio input device | Mar 22, 2005 | Abandoned |
Array
(
[id] => 329510
[patent_doc_number] => 07516315
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-07
[patent_title] => 'Electronic device having an alterable configuration and methods of manufacturing and configuring the same'
[patent_app_type] => utility
[patent_app_number] => 11/082706
[patent_app_country] => US
[patent_app_date] => 2005-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3706
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/516/07516315.pdf
[firstpage_image] =>[orig_patent_app_number] => 11082706
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/082706 | Electronic device having an alterable configuration and methods of manufacturing and configuring the same | Mar 17, 2005 | Issued |
Array
(
[id] => 329547
[patent_doc_number] => 07516335
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-07
[patent_title] => 'Network control device for an image forming apparatus that enables a network filter during a grace time before entering an energy saving mode'
[patent_app_type] => utility
[patent_app_number] => 11/081774
[patent_app_country] => US
[patent_app_date] => 2005-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 10636
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/516/07516335.pdf
[firstpage_image] =>[orig_patent_app_number] => 11081774
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/081774 | Network control device for an image forming apparatus that enables a network filter during a grace time before entering an energy saving mode | Mar 16, 2005 | Issued |
Array
(
[id] => 590430
[patent_doc_number] => 07464277
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-09
[patent_title] => 'Microprocessor performance mode control utilizing sensed temperature as an indication of microprocessor utilization'
[patent_app_type] => utility
[patent_app_number] => 11/046433
[patent_app_country] => US
[patent_app_date] => 2005-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3511
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/464/07464277.pdf
[firstpage_image] =>[orig_patent_app_number] => 11046433
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/046433 | Microprocessor performance mode control utilizing sensed temperature as an indication of microprocessor utilization | Jan 27, 2005 | Issued |
Array
(
[id] => 198522
[patent_doc_number] => 07636861
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-22
[patent_title] => 'Bus technique for controlling power states of blades in a blade enclosure'
[patent_app_type] => utility
[patent_app_number] => 11/045829
[patent_app_country] => US
[patent_app_date] => 2005-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 3331
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/636/07636861.pdf
[firstpage_image] =>[orig_patent_app_number] => 11045829
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/045829 | Bus technique for controlling power states of blades in a blade enclosure | Jan 26, 2005 | Issued |
Array
(
[id] => 5673975
[patent_doc_number] => 20060179330
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Apparatus and method for ensuring power compatibility between a system board and a processing device'
[patent_app_type] => utility
[patent_app_number] => 11/045833
[patent_app_country] => US
[patent_app_date] => 2005-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1221
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20060179330.pdf
[firstpage_image] =>[orig_patent_app_number] => 11045833
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/045833 | Apparatus and method for ensuring power compatibility between a system board and a processing device | Jan 26, 2005 | Abandoned |
Array
(
[id] => 898167
[patent_doc_number] => 07346794
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-03-18
[patent_title] => 'Method and apparatus for providing clocking phase alignment in a transceiver system'
[patent_app_type] => utility
[patent_app_number] => 11/040423
[patent_app_country] => US
[patent_app_date] => 2005-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4781
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/346/07346794.pdf
[firstpage_image] =>[orig_patent_app_number] => 11040423
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/040423 | Method and apparatus for providing clocking phase alignment in a transceiver system | Jan 20, 2005 | Issued |
Array
(
[id] => 898167
[patent_doc_number] => 07346794
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-03-18
[patent_title] => 'Method and apparatus for providing clocking phase alignment in a transceiver system'
[patent_app_type] => utility
[patent_app_number] => 11/040423
[patent_app_country] => US
[patent_app_date] => 2005-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4781
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/346/07346794.pdf
[firstpage_image] =>[orig_patent_app_number] => 11040423
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/040423 | Method and apparatus for providing clocking phase alignment in a transceiver system | Jan 20, 2005 | Issued |
Array
(
[id] => 5877368
[patent_doc_number] => 20060167657
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Systems and methods for maintaining performance'
[patent_app_type] => utility
[patent_app_number] => 11/040394
[patent_app_country] => US
[patent_app_date] => 2005-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5601
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0167/20060167657.pdf
[firstpage_image] =>[orig_patent_app_number] => 11040394
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/040394 | Systems and methods for maintaining performance of an integrated circuit within a working power limit | Jan 20, 2005 | Issued |
Array
(
[id] => 5877368
[patent_doc_number] => 20060167657
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Systems and methods for maintaining performance'
[patent_app_type] => utility
[patent_app_number] => 11/040394
[patent_app_country] => US
[patent_app_date] => 2005-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5601
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0167/20060167657.pdf
[firstpage_image] =>[orig_patent_app_number] => 11040394
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/040394 | Systems and methods for maintaining performance of an integrated circuit within a working power limit | Jan 20, 2005 | Issued |
Array
(
[id] => 305774
[patent_doc_number] => 07536578
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-05-19
[patent_title] => 'Method and apparatus for over clocking in a digital processing system'
[patent_app_type] => utility
[patent_app_number] => 10/587607
[patent_app_country] => US
[patent_app_date] => 2005-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4456
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/536/07536578.pdf
[firstpage_image] =>[orig_patent_app_number] => 10587607
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/587607 | Method and apparatus for over clocking in a digital processing system | Jan 19, 2005 | Issued |