
Hung T. Nguyen
Examiner (ID: 15433, Phone: (571)272-2982 , Office: P/2682 )
| Most Active Art Unit | 2612 |
| Art Unit(s) | 2681, 2632, 2683, 2612, 2736, 2682, 2636, 2686, 2831 |
| Total Applications | 1638 |
| Issued Applications | 1316 |
| Pending Applications | 51 |
| Abandoned Applications | 276 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6752079
[patent_doc_number] => 20030046600
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'Processor'
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[patent_app_number] => 10/234857
[patent_app_country] => US
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[pdf_file] => publications/A1/0046/20030046600.pdf
[firstpage_image] =>[orig_patent_app_number] => 10234857
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/234857 | Processor capable of preventing sleep/hold state based on a difference between a processing block address and a writing block address | Sep 4, 2002 | Issued |
Array
(
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[patent_doc_number] => 20040015734
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[patent_issue_date] => 2004-01-22
[patent_title] => 'Automatic output delay timing adjustment for programmable glitch filter'
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[firstpage_image] =>[orig_patent_app_number] => 10199261
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/199261 | Automatic output delay timing adjustment for programmable glitch filter | Jul 18, 2002 | Issued |
Array
(
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[patent_issue_date] => 2006-12-05
[patent_title] => 'Use of a signal line to adjust width and/or frequency of a communication link during system operation'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/198637 | Use of a signal line to adjust width and/or frequency of a communication link during system operation | Jul 17, 2002 | Issued |
Array
(
[id] => 749519
[patent_doc_number] => 07032120
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-04-18
[patent_title] => 'Method and apparatus for minimizing power requirements in a computer peripheral device while in suspend state and returning to full operation state without loss of data'
[patent_app_type] => utility
[patent_app_number] => 10/197719
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/197719 | Method and apparatus for minimizing power requirements in a computer peripheral device while in suspend state and returning to full operation state without loss of data | Jul 17, 2002 | Issued |
Array
(
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[patent_issue_date] => 2005-07-12
[patent_title] => 'Method and apparatus for controlling the phase of the clock output of a digital clock'
[patent_app_type] => utility
[patent_app_number] => 10/199260
[patent_app_country] => US
[patent_app_date] => 2002-07-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/199260 | Method and apparatus for controlling the phase of the clock output of a digital clock | Jul 17, 2002 | Issued |
Array
(
[id] => 6693844
[patent_doc_number] => 20030041276
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[patent_issue_date] => 2003-02-27
[patent_title] => 'Semiconductor device allowing control of clock supply to processor on a clock cycle basis'
[patent_app_type] => new
[patent_app_number] => 10/197578
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[firstpage_image] =>[orig_patent_app_number] => 10197578
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/197578 | Semiconductor device allowing control of clock supply to processor on a clock cycle basis | Jul 17, 2002 | Abandoned |
Array
(
[id] => 7621138
[patent_doc_number] => 06978363
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[patent_kind] => B2
[patent_issue_date] => 2005-12-20
[patent_title] => 'System and method to enable a legacy BIOS system to boot from a disk that includes EFI GPT partitions'
[patent_app_type] => utility
[patent_app_number] => 10/186689
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/978/06978363.pdf
[firstpage_image] =>[orig_patent_app_number] => 10186689
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/186689 | System and method to enable a legacy BIOS system to boot from a disk that includes EFI GPT partitions | Jul 1, 2002 | Issued |
Array
(
[id] => 7446413
[patent_doc_number] => 20040003303
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-01
[patent_title] => 'Methods and apparatus for power management'
[patent_app_type] => new
[patent_app_number] => 10/188271
[patent_app_country] => US
[patent_app_date] => 2002-07-01
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0003/20040003303.pdf
[firstpage_image] =>[orig_patent_app_number] => 10188271
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/188271 | Methods and apparatus for static and dynamic power management of computer systems | Jun 30, 2002 | Issued |
Array
(
[id] => 955179
[patent_doc_number] => 06959395
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[patent_kind] => B2
[patent_issue_date] => 2005-10-25
[patent_title] => 'Method and apparatus for the conditional enablement of PCI power management'
[patent_app_type] => utility
[patent_app_number] => 10/180148
[patent_app_country] => US
[patent_app_date] => 2002-06-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/180148 | Method and apparatus for the conditional enablement of PCI power management | Jun 25, 2002 | Issued |
Array
(
[id] => 6824481
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[patent_issue_date] => 2003-12-25
[patent_title] => 'Circuit, system and method for selectively turning off internal clock drivers'
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Array
(
[id] => 609598
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[patent_title] => 'Method and unit for selectively enabling an input buffer based on an indication of a clock transition'
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Array
(
[id] => 945855
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[patent_title] => 'Multiple server in-rush current reduction'
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Array
(
[id] => 7608064
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Array
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Array
(
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/125265 | System for and method of network booting of an operating system to a client computer using hibernation | Apr 17, 2002 | Issued |