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Hwei-siu C Payer

Examiner (ID: 17804, Phone: (571)272-4511 , Office: P/3724 )

Most Active Art Unit
3724
Art Unit(s)
3724, 3204, 2899
Total Applications
3745
Issued Applications
2922
Pending Applications
182
Abandoned Applications
670

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20153149 [patent_doc_number] => 20250252987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => SEMICONDUCTOR DEVICE AND OPERATING METHOD OF THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/763876 [patent_app_country] => US [patent_app_date] => 2024-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18763876 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/763876
SEMICONDUCTOR DEVICE AND OPERATING METHOD OF THE SEMICONDUCTOR DEVICE Jul 2, 2024 Pending
Array ( [id] => 19951096 [patent_doc_number] => 12322466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Memory device with redundancy for page-based repair [patent_app_type] => utility [patent_app_number] => 18/761619 [patent_app_country] => US [patent_app_date] => 2024-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18761619 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/761619
Memory device with redundancy for page-based repair Jul 1, 2024 Issued
Array ( [id] => 19696120 [patent_doc_number] => 20250014665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => TRIPLE VIA CHAIN FOR ADVANCED INTERCONNECT IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/759105 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12209 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18759105 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/759105
TRIPLE VIA CHAIN FOR ADVANCED INTERCONNECT IN A MEMORY DEVICE Jun 27, 2024 Pending
Array ( [id] => 19866006 [patent_doc_number] => 20250104792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => APPARATUS INCLUDING BTI CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/751936 [patent_app_country] => US [patent_app_date] => 2024-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18751936 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/751936
APPARATUS INCLUDING BTI CONTROLLER Jun 23, 2024 Pending
Array ( [id] => 20250891 [patent_doc_number] => 20250299760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => Scannable Memory Subsystem [patent_app_type] => utility [patent_app_number] => 18/752638 [patent_app_country] => US [patent_app_date] => 2024-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18752638 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/752638
Scannable Memory Subsystem Jun 23, 2024 Pending
Array ( [id] => 20132102 [patent_doc_number] => 12374419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Method and system for replacement of memory cells [patent_app_type] => utility [patent_app_number] => 18/749098 [patent_app_country] => US [patent_app_date] => 2024-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18749098 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/749098
Method and system for replacement of memory cells Jun 19, 2024 Issued
Array ( [id] => 20132101 [patent_doc_number] => 12374418 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Techniques for detecting a state of a bus [patent_app_type] => utility [patent_app_number] => 18/742749 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14699 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742749 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742749
Techniques for detecting a state of a bus Jun 12, 2024 Issued
Array ( [id] => 19467708 [patent_doc_number] => 20240321378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION [patent_app_type] => utility [patent_app_number] => 18/736779 [patent_app_country] => US [patent_app_date] => 2024-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10227 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18736779 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/736779
BUILT-IN MEMORY REPAIR WITH REPAIR CODE COMPRESSION Jun 6, 2024 Pending
Array ( [id] => 20019344 [patent_doc_number] => 20250157566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => MEMORY SYSTEMS AND DEVICES HAVING ENHANCED COLUMN REPAIR CAPABILITY AND METHODS OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 18/670883 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3518 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18670883 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/670883
MEMORY SYSTEMS AND DEVICES HAVING ENHANCED COLUMN REPAIR CAPABILITY AND METHODS OF OPERATING SAME May 21, 2024 Pending
Array ( [id] => 19604475 [patent_doc_number] => 20240395355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/671964 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671964 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671964
MEMORY DEVICE May 21, 2024 Pending
Array ( [id] => 19604469 [patent_doc_number] => 20240395349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => APPARATUSES AND METHODS FOR FORCING MEMORY CELL FAILURES IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/667358 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18667358 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/667358
APPARATUSES AND METHODS FOR FORCING MEMORY CELL FAILURES IN A MEMORY DEVICE May 16, 2024 Pending
Array ( [id] => 20167647 [patent_doc_number] => 20250259694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => MEMORY INCLUDING SENSE AMPLIFIER AND OPERATION METHOD OF MEMORY [patent_app_type] => utility [patent_app_number] => 18/665595 [patent_app_country] => US [patent_app_date] => 2024-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18665595 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/665595
MEMORY INCLUDING SENSE AMPLIFIER AND OPERATION METHOD OF MEMORY May 15, 2024 Pending
Array ( [id] => 19803757 [patent_doc_number] => 20250069682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => MEMORY DEVICE INCLUDING REPAIR CIRCUIT AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/665817 [patent_app_country] => US [patent_app_date] => 2024-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18665817 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/665817
MEMORY DEVICE INCLUDING REPAIR CIRCUIT AND OPERATING METHOD THEREOF May 15, 2024 Pending
Array ( [id] => 20352528 [patent_doc_number] => 20250349380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE TESTING APPARATUS AND SEMICONDUCTOR DEVICE TESTING METHOD [patent_app_type] => utility [patent_app_number] => 18/658275 [patent_app_country] => US [patent_app_date] => 2024-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658275 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/658275
SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE TESTING APPARATUS AND SEMICONDUCTOR DEVICE TESTING METHOD May 7, 2024 Pending
Array ( [id] => 20036075 [patent_doc_number] => 20250174297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => STORAGE DEVICE AND METHOD OF OPERATING STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/653688 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/653688
STORAGE DEVICE AND METHOD OF OPERATING STORAGE DEVICE May 1, 2024 Pending
Array ( [id] => 19559668 [patent_doc_number] => 20240371460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => SEQUENTIAL ACCESS TO LINKED MEMORY DICE FOR BUS TRAINING [patent_app_type] => utility [patent_app_number] => 18/651357 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18651357 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/651357
SEQUENTIAL ACCESS TO LINKED MEMORY DICE FOR BUS TRAINING Apr 29, 2024 Pending
Array ( [id] => 19574892 [patent_doc_number] => 20240379184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 18/650942 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6859 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18650942 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/650942
SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD OF THE SAME Apr 29, 2024 Pending
Array ( [id] => 19384355 [patent_doc_number] => 20240274225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => METHOD FOR PERFORMING AGING TEST ON SEMICONDUCTOR USED FOR NEURAL NETWORK [patent_app_type] => utility [patent_app_number] => 18/648655 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18648655 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/648655
METHOD FOR PERFORMING AGING TEST ON SEMICONDUCTOR USED FOR NEURAL NETWORK Apr 28, 2024 Pending
Array ( [id] => 20324372 [patent_doc_number] => 20250336460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => VARIABLE RESISTANCE FOR CURRENT CONTROL IN NONVOLATILE MEMORY ARRAYS [patent_app_type] => utility [patent_app_number] => 18/648506 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18648506 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/648506
VARIABLE RESISTANCE FOR CURRENT CONTROL IN NONVOLATILE MEMORY ARRAYS Apr 28, 2024 Pending
Array ( [id] => 19546151 [patent_doc_number] => 20240363187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => AREA SAVING HIGH COVERAGE FAST DIAGNOSIS MEMORY SCAN DESIGN [patent_app_type] => utility [patent_app_number] => 18/635569 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635569 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635569
AREA SAVING HIGH COVERAGE FAST DIAGNOSIS MEMORY SCAN DESIGN Apr 14, 2024 Pending
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