Search

Hyun Nam

Examiner (ID: 14863, Phone: (571)270-1725 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2183
Total Applications
1039
Issued Applications
880
Pending Applications
63
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16667074 [patent_doc_number] => 10936320 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-02 [patent_title] => Efficient performance of inner loops on a multi-lane processor [patent_app_type] => utility [patent_app_number] => 16/543540 [patent_app_country] => US [patent_app_date] => 2019-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543540 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543540
Efficient performance of inner loops on a multi-lane processor Aug 16, 2019 Issued
Array ( [id] => 15714735 [patent_doc_number] => 20200104134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => COMPUTING 2-BODY STATISTICS ON GRAPHICS PROCESSING UNITS (GPUs) [patent_app_type] => utility [patent_app_number] => 16/521852 [patent_app_country] => US [patent_app_date] => 2019-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521852 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521852
Computing 2-body statistics on graphics processing units (GPUs) Jul 24, 2019 Issued
Array ( [id] => 16201010 [patent_doc_number] => 10726177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Reconfigurable interconnect [patent_app_type] => utility [patent_app_number] => 16/517371 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 32755 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16517371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/517371
Reconfigurable interconnect Jul 18, 2019 Issued
Array ( [id] => 17744445 [patent_doc_number] => 11392514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Data processing apparatus having multiple processors and multiple interfaces [patent_app_type] => utility [patent_app_number] => 17/280572 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4128 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17280572 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/280572
Data processing apparatus having multiple processors and multiple interfaces Jul 17, 2019 Issued
Array ( [id] => 15500773 [patent_doc_number] => 20200050575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => FLEXIBLE PROTOCOL AND ASSOCIATED HARDWARE FOR ONE-WIRE RADIO FREQUENCY FRONT-END INTERFACE [patent_app_type] => utility [patent_app_number] => 16/509957 [patent_app_country] => US [patent_app_date] => 2019-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13940 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16509957 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/509957
Flexible protocol and associated hardware for one-wire radio frequency front-end interface Jul 11, 2019 Issued
Array ( [id] => 17209577 [patent_doc_number] => 11169950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Method for controlling serial port information of server host [patent_app_type] => utility [patent_app_number] => 16/509758 [patent_app_country] => US [patent_app_date] => 2019-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2086 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16509758 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/509758
Method for controlling serial port information of server host Jul 11, 2019 Issued
Array ( [id] => 15120929 [patent_doc_number] => 20190347097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => DIGITAL SIGNAL PROCESSING ARRAY USING INTEGRATED PROCESSING ELEMENTS [patent_app_type] => utility [patent_app_number] => 16/503447 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503447
Digital signal processing array using integrated processing elements Jul 2, 2019 Issued
Array ( [id] => 15027311 [patent_doc_number] => 20190324660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/503200 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503200 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503200
Semiconductor device and operating method thereof Jul 2, 2019 Issued
Array ( [id] => 15027355 [patent_doc_number] => 20190324682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => MANAGING A COLLECTION OF DATA [patent_app_type] => utility [patent_app_number] => 16/502323 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11331 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16502323 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/502323
Managing a collection of data Jul 2, 2019 Issued
Array ( [id] => 16292227 [patent_doc_number] => 10769078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => Apparatus and method for memory management in a graphics processing environment [patent_app_type] => utility [patent_app_number] => 16/453995 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 31 [patent_no_of_words] => 33277 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16453995 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/453995
Apparatus and method for memory management in a graphics processing environment Jun 25, 2019 Issued
Array ( [id] => 17659340 [patent_doc_number] => 20220179805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => ADAPTIVE PIPELINE SELECTION FOR ACCELERATING MEMORY COPY OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/441668 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17441668 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/441668
Adaptive pipeline selection for accelerating memory copy operations Jun 20, 2019 Issued
Array ( [id] => 15472811 [patent_doc_number] => 10552283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Methods and apparatus to communicatively couple field devices to a remote terminal unit [patent_app_type] => utility [patent_app_number] => 16/447549 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 18167 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16447549 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/447549
Methods and apparatus to communicatively couple field devices to a remote terminal unit Jun 19, 2019 Issued
Array ( [id] => 16788124 [patent_doc_number] => 10990557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Transmission interface communicating method and connection interface [patent_app_type] => utility [patent_app_number] => 16/441146 [patent_app_country] => US [patent_app_date] => 2019-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3733 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16441146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/441146
Transmission interface communicating method and connection interface Jun 13, 2019 Issued
Array ( [id] => 17230373 [patent_doc_number] => 20210356930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => METHOD AND SYSTEM FOR AUTOMATICALLY CONFIGURING I/O PORT [patent_app_type] => utility [patent_app_number] => 17/287104 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17287104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/287104
Method and system for automatically configuring I/O port Jun 12, 2019 Issued
Array ( [id] => 17288334 [patent_doc_number] => 11204884 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-21 [patent_title] => Adapter for synthetic or redundant remote terminals on single 1553 bus [patent_app_type] => utility [patent_app_number] => 16/439968 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3589 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439968 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439968
Adapter for synthetic or redundant remote terminals on single 1553 bus Jun 12, 2019 Issued
Array ( [id] => 16401058 [patent_doc_number] => 20200341916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => METHOD FOR STATUS MONITORING OF ACCELERATION KERNELS IN A STORAGE DEVICE AND STORAGE DEVICE EMPLOYING THE SAME [patent_app_type] => utility [patent_app_number] => 16/439633 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439633 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/439633
Method for status monitoring of acceleration kernels in a storage device and storage device employing the same Jun 11, 2019 Issued
Array ( [id] => 16520842 [patent_doc_number] => 10872057 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-22 [patent_title] => Partitioning in a compiler flow for a heterogeneous multi-core architecture [patent_app_type] => utility [patent_app_number] => 16/420927 [patent_app_country] => US [patent_app_date] => 2019-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 12893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16420927 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/420927
Partitioning in a compiler flow for a heterogeneous multi-core architecture May 22, 2019 Issued
Array ( [id] => 16745085 [patent_doc_number] => 10970075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Arithmetic processing apparatus, information processing apparatus, and control method for arithmetic processing apparatus [patent_app_type] => utility [patent_app_number] => 16/420821 [patent_app_country] => US [patent_app_date] => 2019-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 14614 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16420821 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/420821
Arithmetic processing apparatus, information processing apparatus, and control method for arithmetic processing apparatus May 22, 2019 Issued
Array ( [id] => 14814181 [patent_doc_number] => 20190273700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-05 [patent_title] => Adding a Network Port to a Network Interface Card Via NC-SI Embedded CPU [patent_app_type] => utility [patent_app_number] => 16/416224 [patent_app_country] => US [patent_app_date] => 2019-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416224 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/416224
Adding a network port to a network interface card via NC-SI embedded CPU May 18, 2019 Issued
Array ( [id] => 17817197 [patent_doc_number] => 11422808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Transactional compare-and-discard instruction [patent_app_type] => utility [patent_app_number] => 17/258287 [patent_app_country] => US [patent_app_date] => 2019-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10864 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17258287 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/258287
Transactional compare-and-discard instruction May 8, 2019 Issued
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