
Hyun Nam
Examiner (ID: 14863, Phone: (571)270-1725 , Office: P/2184 )
| Most Active Art Unit | 2184 |
| Art Unit(s) | 2184, 2183 |
| Total Applications | 1039 |
| Issued Applications | 880 |
| Pending Applications | 63 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16255516
[patent_doc_number] => 20200264890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-20
[patent_title] => DIGIT VALIDATION CHECK CONTROL IN INSTRUCTION EXECUTION
[patent_app_type] => utility
[patent_app_number] => 16/277486
[patent_app_country] => US
[patent_app_date] => 2019-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15400
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277486
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/277486 | Digit validation check control in instruction execution | Feb 14, 2019 | Issued |
Array
(
[id] => 17283027
[patent_doc_number] => 11200056
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-14
[patent_title] => Parallel union control device, parallel union control method, and storage medium
[patent_app_type] => utility
[patent_app_number] => 16/967866
[patent_app_country] => US
[patent_app_date] => 2019-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 15130
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16967866
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/967866 | Parallel union control device, parallel union control method, and storage medium | Feb 4, 2019 | Issued |
Array
(
[id] => 14656663
[patent_doc_number] => 20190235460
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-01
[patent_title] => INTERRUPT EXCEPTION WINDOW PROTOCOL ON A DATA COMMUNICATION BUS AND METHODS AND APPARATUSES FOR USING SAME
[patent_app_type] => utility
[patent_app_number] => 16/264244
[patent_app_country] => US
[patent_app_date] => 2019-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8168
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 366
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16264244
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/264244 | Interrupt exception window protocol on a data communication bus and methods and apparatuses for using same | Jan 30, 2019 | Issued |
Array
(
[id] => 17394754
[patent_doc_number] => 11243768
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-08
[patent_title] => Mechanism for saving and retrieving micro-architecture context
[patent_app_type] => utility
[patent_app_number] => 16/259880
[patent_app_country] => US
[patent_app_date] => 2019-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 8139
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16259880
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/259880 | Mechanism for saving and retrieving micro-architecture context | Jan 27, 2019 | Issued |
Array
(
[id] => 14314383
[patent_doc_number] => 20190146895
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-16
[patent_title] => PACKET BACKPRESSURE DETECTION METHOD, APPARATUS, AND DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/250168
[patent_app_country] => US
[patent_app_date] => 2019-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12970
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16250168
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/250168 | Packet backpressure detection method, apparatus, and device | Jan 16, 2019 | Issued |
Array
(
[id] => 18119671
[patent_doc_number] => 11551066
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-10
[patent_title] => Deep neural networks (DNN) hardware accelerator and operation method thereof
[patent_app_type] => utility
[patent_app_number] => 16/248042
[patent_app_country] => US
[patent_app_date] => 2019-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5961
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16248042
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/248042 | Deep neural networks (DNN) hardware accelerator and operation method thereof | Jan 14, 2019 | Issued |
Array
(
[id] => 15386783
[patent_doc_number] => 10534576
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-14
[patent_title] => Optimization apparatus and control method thereof
[patent_app_type] => utility
[patent_app_number] => 16/248028
[patent_app_country] => US
[patent_app_date] => 2019-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 11769
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16248028
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/248028 | Optimization apparatus and control method thereof | Jan 14, 2019 | Issued |
Array
(
[id] => 17636943
[patent_doc_number] => 11347667
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-31
[patent_title] => Bus controller and related methods
[patent_app_type] => utility
[patent_app_number] => 16/243698
[patent_app_country] => US
[patent_app_date] => 2019-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10609
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16243698
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/243698 | Bus controller and related methods | Jan 8, 2019 | Issued |
Array
(
[id] => 14314465
[patent_doc_number] => 20190146936
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-16
[patent_title] => DYNAMICALLY REMAPPING IN-PROCESS DATA TRANSFERS
[patent_app_type] => utility
[patent_app_number] => 16/243936
[patent_app_country] => US
[patent_app_date] => 2019-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4799
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16243936
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/243936 | Dynamically remapping in-process data transfers | Jan 8, 2019 | Issued |
Array
(
[id] => 17744453
[patent_doc_number] => 11392523
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-19
[patent_title] => Electronic device and operation method of electronic device
[patent_app_type] => utility
[patent_app_number] => 16/957633
[patent_app_country] => US
[patent_app_date] => 2019-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 12257
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16957633
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/957633 | Electronic device and operation method of electronic device | Jan 1, 2019 | Issued |
Array
(
[id] => 14314479
[patent_doc_number] => 20190146943
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-16
[patent_title] => Method and Apparatus for Host Adaptation to a Change of Persona of a Configurable Integrated Circuit Die
[patent_app_type] => utility
[patent_app_number] => 16/232014
[patent_app_country] => US
[patent_app_date] => 2018-12-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16168
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16232014
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/232014 | Method and apparatus for host adaptation to a change of persona of a configurable integrated circuit die | Dec 24, 2018 | Issued |
Array
(
[id] => 16292241
[patent_doc_number] => 10769092
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-08
[patent_title] => Apparatus and method for reducing latency of input/output transactions in an information handling system using no-response commands
[patent_app_type] => utility
[patent_app_number] => 16/227710
[patent_app_country] => US
[patent_app_date] => 2018-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4228
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16227710
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/227710 | Apparatus and method for reducing latency of input/output transactions in an information handling system using no-response commands | Dec 19, 2018 | Issued |
Array
(
[id] => 16431411
[patent_doc_number] => 10831493
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-10
[patent_title] => Hardware apparatus to measure memory locality
[patent_app_type] => utility
[patent_app_number] => 16/220262
[patent_app_country] => US
[patent_app_date] => 2018-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6168
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16220262
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/220262 | Hardware apparatus to measure memory locality | Dec 13, 2018 | Issued |
Array
(
[id] => 17136458
[patent_doc_number] => 11138011
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-05
[patent_title] => Device, data-processing chain and context-switching method
[patent_app_type] => utility
[patent_app_number] => 16/219167
[patent_app_country] => US
[patent_app_date] => 2018-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4120
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 349
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16219167
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/219167 | Device, data-processing chain and context-switching method | Dec 12, 2018 | Issued |
Array
(
[id] => 17223418
[patent_doc_number] => 11175919
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-11-16
[patent_title] => Synchronization of concurrent computation engines
[patent_app_type] => utility
[patent_app_number] => 16/219610
[patent_app_country] => US
[patent_app_date] => 2018-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 15554
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16219610
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/219610 | Synchronization of concurrent computation engines | Dec 12, 2018 | Issued |
Array
(
[id] => 16683264
[patent_doc_number] => 10942742
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-03-09
[patent_title] => Hardware engine with configurable instructions
[patent_app_type] => utility
[patent_app_number] => 16/216212
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9969
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216212
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/216212 | Hardware engine with configurable instructions | Dec 10, 2018 | Issued |
Array
(
[id] => 14506319
[patent_doc_number] => 20190196814
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-27
[patent_title] => MULTIPLE-PIPELINE ARCHITECTURE WITH SPECIAL NUMBER DETECTION
[patent_app_type] => utility
[patent_app_number] => 16/215553
[patent_app_country] => US
[patent_app_date] => 2018-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8618
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215553
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215553 | Multiple-pipeline architecture with special number detection | Dec 9, 2018 | Issued |
Array
(
[id] => 16017687
[patent_doc_number] => 20200183687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-11
[patent_title] => MACRO-OP FUSION
[patent_app_type] => utility
[patent_app_number] => 16/215328
[patent_app_country] => US
[patent_app_date] => 2018-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8005
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -36
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215328
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215328 | Macro-op fusion | Dec 9, 2018 | Issued |
Array
(
[id] => 14107451
[patent_doc_number] => 20190095401
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-28
[patent_title] => APPARATUS AND METHODS FOR VECTOR OPERATIONS
[patent_app_type] => utility
[patent_app_number] => 16/172649
[patent_app_country] => US
[patent_app_date] => 2018-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6627
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172649
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/172649 | Apparatus and methods for vector operations | Oct 25, 2018 | Issued |
Array
(
[id] => 17622155
[patent_doc_number] => 11341211
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-24
[patent_title] => Apparatus and methods for vector operations
[patent_app_type] => utility
[patent_app_number] => 16/172657
[patent_app_country] => US
[patent_app_date] => 2018-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6627
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172657
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/172657 | Apparatus and methods for vector operations | Oct 25, 2018 | Issued |