Search

Hyun Nam

Examiner (ID: 14863, Phone: (571)270-1725 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2183
Total Applications
1039
Issued Applications
880
Pending Applications
63
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16065005 [patent_doc_number] => 10691452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Method and apparatus for performing a vector bit reversal and crossing [patent_app_type] => utility [patent_app_number] => 15/729566 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 34 [patent_no_of_words] => 17532 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729566 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/729566
Method and apparatus for performing a vector bit reversal and crossing Oct 9, 2017 Issued
Array ( [id] => 15471887 [patent_doc_number] => 10551815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Systems and methods for enhanced modular controller port to port communication [patent_app_type] => utility [patent_app_number] => 15/720654 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 10115 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720654 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720654
Systems and methods for enhanced modular controller port to port communication Sep 28, 2017 Issued
Array ( [id] => 15059111 [patent_doc_number] => 10459861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Unified cache for diverse memory traffic [patent_app_type] => utility [patent_app_number] => 15/716461 [patent_app_country] => US [patent_app_date] => 2017-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 12881 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15716461 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/716461
Unified cache for diverse memory traffic Sep 25, 2017 Issued
Array ( [id] => 14601033 [patent_doc_number] => 10353709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Digital signal processing array using integrated processing elements [patent_app_type] => utility [patent_app_number] => 15/703677 [patent_app_country] => US [patent_app_date] => 2017-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 10792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15703677 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/703677
Digital signal processing array using integrated processing elements Sep 12, 2017 Issued
Array ( [id] => 13083329 [patent_doc_number] => 10061731 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-28 [patent_title] => Selectable peripheral logic in programmable apparatus [patent_app_type] => utility [patent_app_number] => 15/702869 [patent_app_country] => US [patent_app_date] => 2017-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7325 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15702869 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/702869
Selectable peripheral logic in programmable apparatus Sep 12, 2017 Issued
Array ( [id] => 14953005 [patent_doc_number] => 10437767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Expandable interface board [patent_app_type] => utility [patent_app_number] => 15/702644 [patent_app_country] => US [patent_app_date] => 2017-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 3116 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15702644 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/702644
Expandable interface board Sep 11, 2017 Issued
Array ( [id] => 14047557 [patent_doc_number] => 20190079885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => METHOD AND APPARATUS FOR LOADING A MATRIX INTO AN ACCELERATOR [patent_app_type] => utility [patent_app_number] => 15/702356 [patent_app_country] => US [patent_app_date] => 2017-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15702356 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/702356
Method and apparatus for loading a matrix into an accelerator Sep 11, 2017 Issued
Array ( [id] => 14047567 [patent_doc_number] => 20190079890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => Adapters, Systems And Methods For Adapting PCIe Expansion Cards To PCIe Component Bays [patent_app_type] => utility [patent_app_number] => 15/702299 [patent_app_country] => US [patent_app_date] => 2017-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6832 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15702299 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/702299
Adapters, systems and methods for adapting PCIe expansion cards to PCIe component bays Sep 11, 2017 Issued
Array ( [id] => 12665347 [patent_doc_number] => 20180113615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => STORAGE DEVICE GENERATING ADAPTIVE INTERRUPT AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/702275 [patent_app_country] => US [patent_app_date] => 2017-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15702275 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/702275
STORAGE DEVICE GENERATING ADAPTIVE INTERRUPT AND OPERATING METHOD THEREOF Sep 11, 2017 Abandoned
Array ( [id] => 14022459 [patent_doc_number] => 20190073223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => HYBRID FAST PATH FILTER BRANCH PREDICTOR [patent_app_type] => utility [patent_app_number] => 15/695733 [patent_app_country] => US [patent_app_date] => 2017-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15695733 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/695733
HYBRID FAST PATH FILTER BRANCH PREDICTOR Sep 4, 2017 Abandoned
Array ( [id] => 13240997 [patent_doc_number] => 10133697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Computer architecture to provide flexibility and/or scalability [patent_app_type] => utility [patent_app_number] => 15/678188 [patent_app_country] => US [patent_app_date] => 2017-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 13811 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15678188 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/678188
Computer architecture to provide flexibility and/or scalability Aug 15, 2017 Issued
Array ( [id] => 14750631 [patent_doc_number] => 20190258489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => HANDLING OF INTER-ELEMENT ADDRESS HAZARDS FOR VECTOR INSTRUCTIONS [patent_app_type] => utility [patent_app_number] => 16/331179 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10335 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16331179 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/331179
Handling of inter-element address hazards for vector instructions Aug 13, 2017 Issued
Array ( [id] => 15854933 [patent_doc_number] => 10642752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Auxiliary processor resources [patent_app_type] => utility [patent_app_number] => 15/663223 [patent_app_country] => US [patent_app_date] => 2017-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 9981 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15663223 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/663223
Auxiliary processor resources Jul 27, 2017 Issued
Array ( [id] => 15120935 [patent_doc_number] => 20190347100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => SYSTEMS, METHODS, AND APPARATUSES FOR TILE TRANSPOSE [patent_app_type] => utility [patent_app_number] => 16/474475 [patent_app_country] => US [patent_app_date] => 2017-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16474475 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/474475
Systems, methods, and apparatuses for tile transpose Jun 30, 2017 Issued
Array ( [id] => 13109891 [patent_doc_number] => 10073598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => Haptically enhanced interactivity with interactive content [patent_app_type] => utility [patent_app_number] => 15/639394 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6612 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15639394 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/639394
Haptically enhanced interactivity with interactive content Jun 29, 2017 Issued
Array ( [id] => 16416686 [patent_doc_number] => 10824581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Peripheral component interconnect express (PCIe) device enumeration via a PCIe switch [patent_app_type] => utility [patent_app_number] => 15/634396 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5311 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634396 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634396
Peripheral component interconnect express (PCIe) device enumeration via a PCIe switch Jun 26, 2017 Issued
Array ( [id] => 15545519 [patent_doc_number] => 10572542 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-25 [patent_title] => Identifying a vehicle based on signals available on a bus [patent_app_type] => utility [patent_app_number] => 15/634413 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 6850 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634413 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634413
Identifying a vehicle based on signals available on a bus Jun 26, 2017 Issued
Array ( [id] => 13721731 [patent_doc_number] => 20170371820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-28 [patent_title] => In-Connector Data Storage Device [patent_app_type] => utility [patent_app_number] => 15/633407 [patent_app_country] => US [patent_app_date] => 2017-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5688 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15633407 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/633407
In-connector data storage device Jun 25, 2017 Issued
Array ( [id] => 12140213 [patent_doc_number] => 20180018296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'FLOW CONTROL PROTOCOL FOR AN AUDIO BUS' [patent_app_type] => utility [patent_app_number] => 15/632519 [patent_app_country] => US [patent_app_date] => 2017-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9454 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15632519 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/632519
FLOW CONTROL PROTOCOL FOR AN AUDIO BUS Jun 25, 2017 Abandoned
Array ( [id] => 13580131 [patent_doc_number] => 20180341614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => System and Method for I/O Aware Processor Configuration [patent_app_type] => utility [patent_app_number] => 15/606804 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6570 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15606804 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/606804
System and method for I/O aware processor configuration May 25, 2017 Issued
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