Search

Hyun Nam

Examiner (ID: 14863, Phone: (571)270-1725 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2183
Total Applications
1039
Issued Applications
880
Pending Applications
63
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12187654 [patent_doc_number] => 20180046590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'BUFFER DEVICE, AN ELECTRONIC SYSTEM, AND A METHOD FOR OPERATING A BUFFER DEVICE' [patent_app_type] => utility [patent_app_number] => 15/236253 [patent_app_country] => US [patent_app_date] => 2016-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4820 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15236253 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/236253
Buffer device, an electronic system, and a method for operating a buffer device Aug 11, 2016 Issued
Array ( [id] => 11501661 [patent_doc_number] => 20170075846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'INPUT/OUTPUT PROCESSING' [patent_app_type] => utility [patent_app_number] => 15/229908 [patent_app_country] => US [patent_app_date] => 2016-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229908 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/229908
Input/output processing Aug 4, 2016 Issued
Array ( [id] => 13395157 [patent_doc_number] => 20180249121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => FRAME GENERATION APPARATUS, FRAME GENERATION METHOD, SIGNAL EXTRACTION APPARATUS, SIGNAL EXTRACTION METHOD, AND IMAGE TRANSMISSION SYSTEM [patent_app_type] => utility [patent_app_number] => 15/773034 [patent_app_country] => US [patent_app_date] => 2016-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15773034 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/773034
FRAME GENERATION APPARATUS, FRAME GENERATION METHOD, SIGNAL EXTRACTION APPARATUS, SIGNAL EXTRACTION METHOD, AND IMAGE TRANSMISSION SYSTEM Aug 3, 2016 Abandoned
Array ( [id] => 12146357 [patent_doc_number] => 09880609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Power management' [patent_app_type] => utility [patent_app_number] => 15/226505 [patent_app_country] => US [patent_app_date] => 2016-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12446 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15226505 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/226505
Power management Aug 1, 2016 Issued
Array ( [id] => 11292486 [patent_doc_number] => 20160342418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'FUNCTIONAL UNIT HAVING TREE STRUCTURE TO SUPPORT VECTOR SORTING ALGORITHM AND OTHER ALGORITHMS' [patent_app_type] => utility [patent_app_number] => 15/226714 [patent_app_country] => US [patent_app_date] => 2016-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4093 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15226714 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/226714
Functional unit having tree structure to support vector sorting algorithm and other algorithms Aug 1, 2016 Issued
Array ( [id] => 11131263 [patent_doc_number] => 20160328238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-10 [patent_title] => 'Method and Apparatus for Sorting Elements in Hardware Structures' [patent_app_type] => utility [patent_app_number] => 15/215004 [patent_app_country] => US [patent_app_date] => 2016-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8112 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15215004 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/215004
Method and apparatus for sorting elements in hardware structures Jul 19, 2016 Issued
Array ( [id] => 13255065 [patent_doc_number] => 10140223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-27 [patent_title] => System and method for odd modulus memory channel interleaving [patent_app_type] => utility [patent_app_number] => 15/193423 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5379 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15193423 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/193423
System and method for odd modulus memory channel interleaving Jun 26, 2016 Issued
Array ( [id] => 14555739 [patent_doc_number] => 10346331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Method and apparatus for data detection and event capture [patent_app_type] => utility [patent_app_number] => 15/193654 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5213 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15193654 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/193654
Method and apparatus for data detection and event capture Jun 26, 2016 Issued
Array ( [id] => 12393570 [patent_doc_number] => 09965439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-08 [patent_title] => Low latency multi-protocol retimers [patent_app_type] => utility [patent_app_number] => 15/193941 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6865 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15193941 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/193941
Low latency multi-protocol retimers Jun 26, 2016 Issued
Array ( [id] => 14009691 [patent_doc_number] => 10223305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Input/output computer system including hardware assisted autopurge of cache entries associated with PCI address translations [patent_app_type] => utility [patent_app_number] => 15/193905 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5966 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15193905 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/193905
Input/output computer system including hardware assisted autopurge of cache entries associated with PCI address translations Jun 26, 2016 Issued
Array ( [id] => 12914491 [patent_doc_number] => 20180196673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-12 [patent_title] => VECTOR LENGTH QUERYING INSTRUCTION [patent_app_type] => utility [patent_app_number] => 15/741303 [patent_app_country] => US [patent_app_date] => 2016-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2589 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15741303 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/741303
Vector length querying instruction Jun 22, 2016 Issued
Array ( [id] => 11989181 [patent_doc_number] => 20170293335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'ADJUSTABLE POWER DELIVERY APPARATUS FOR UNIVERSAL SERIAL BUS (USB) TYPE-C' [patent_app_type] => utility [patent_app_number] => 15/169175 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12437 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169175 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169175
ADJUSTABLE POWER DELIVERY APPARATUS FOR UNIVERSAL SERIAL BUS (USB) TYPE-C May 30, 2016 Abandoned
Array ( [id] => 12986269 [patent_doc_number] => 20170344451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => METHODS AND APPARATUS TO COMMUNICATIVELY COUPLE FIELD DEVICES TO A REMOTE TERMINAL UNIT [patent_app_type] => utility [patent_app_number] => 15/168827 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168827 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/168827
Methods and apparatus to communicatively couple field devices to a remote terminal unit May 30, 2016 Issued
Array ( [id] => 12985999 [patent_doc_number] => 20170344360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => PROTECTING FIRMWARE FLASHING FROM POWER OPERATIONS [patent_app_type] => utility [patent_app_number] => 15/169143 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169143 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169143
Protecting firmware flashing from power operations May 30, 2016 Issued
Array ( [id] => 11313721 [patent_doc_number] => 20160349831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'ELECTRONIC DEVICE AND POWER MANAGING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/167062 [patent_app_country] => US [patent_app_date] => 2016-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7781 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15167062 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/167062
ELECTRONIC DEVICE AND POWER MANAGING METHOD THEREOF May 26, 2016 Abandoned
Array ( [id] => 11739043 [patent_doc_number] => 09703626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Recycling error bits in floating point units' [patent_app_type] => utility [patent_app_number] => 15/149988 [patent_app_country] => US [patent_app_date] => 2016-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5168 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149988 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/149988
Recycling error bits in floating point units May 8, 2016 Issued
Array ( [id] => 11037403 [patent_doc_number] => 20160234359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'CONTACTLESS DEVICES AND METHODS OF USE THEREOF' [patent_app_type] => utility [patent_app_number] => 15/099885 [patent_app_country] => US [patent_app_date] => 2016-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10599 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15099885 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/099885
CONTACTLESS DEVICES AND METHODS OF USE THEREOF Apr 14, 2016 Abandoned
Array ( [id] => 12229025 [patent_doc_number] => 09916269 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-13 [patent_title] => 'Packet queueing for network device' [patent_app_type] => utility [patent_app_number] => 15/099543 [patent_app_country] => US [patent_app_date] => 2016-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12433 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15099543 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/099543
Packet queueing for network device Apr 13, 2016 Issued
Array ( [id] => 11644110 [patent_doc_number] => 09665486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Hierarchical cache structure and handling thereof' [patent_app_type] => utility [patent_app_number] => 15/093088 [patent_app_country] => US [patent_app_date] => 2016-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7859 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15093088 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/093088
Hierarchical cache structure and handling thereof Apr 6, 2016 Issued
Array ( [id] => 12513864 [patent_doc_number] => 10002087 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-19 [patent_title] => Communication between an external processor and FPGA controller [patent_app_type] => utility [patent_app_number] => 15/087976 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2549 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15087976 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/087976
Communication between an external processor and FPGA controller Mar 30, 2016 Issued
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