Search

Idowu O. Osifade

Examiner (ID: 7639, Phone: (571)272-0864 , Office: P/2677 )

Most Active Art Unit
2666
Art Unit(s)
2677, 2673, 2666, 2675, 2661
Total Applications
829
Issued Applications
666
Pending Applications
62
Abandoned Applications
125

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9497197 [patent_doc_number] => 08736019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Semiconductor devices with sealed, unlined trenches and methods of forming same' [patent_app_type] => utility [patent_app_number] => 13/091410 [patent_app_country] => US [patent_app_date] => 2011-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 48 [patent_no_of_words] => 13544 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13091410 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/091410
Semiconductor devices with sealed, unlined trenches and methods of forming same Apr 20, 2011 Issued
Array ( [id] => 9455817 [patent_doc_number] => 08716829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Semiconductor devices with sealed, unlined trenches and methods of forming same' [patent_app_type] => utility [patent_app_number] => 13/091416 [patent_app_country] => US [patent_app_date] => 2011-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 48 [patent_no_of_words] => 13544 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13091416 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/091416
Semiconductor devices with sealed, unlined trenches and methods of forming same Apr 20, 2011 Issued
Array ( [id] => 8462608 [patent_doc_number] => 20120267776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'CHIP STACK PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/090281 [patent_app_country] => US [patent_app_date] => 2011-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4156 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13090281 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/090281
Chip stack package having spiral interconnection strands Apr 19, 2011 Issued
Array ( [id] => 8846771 [patent_doc_number] => 08455958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Insulated gate semiconductor device with well region edge positioned within ring-shaped buffer trench' [patent_app_type] => utility [patent_app_number] => 13/090288 [patent_app_country] => US [patent_app_date] => 2011-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 7107 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13090288 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/090288
Insulated gate semiconductor device with well region edge positioned within ring-shaped buffer trench Apr 19, 2011 Issued
Array ( [id] => 7558952 [patent_doc_number] => 20110272783 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'SEMICONDUCTOR DEVICE WITH BIPOLAR TRANSISTOR AND CAPACITOR' [patent_app_type] => utility [patent_app_number] => 13/090347 [patent_app_country] => US [patent_app_date] => 2011-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1771 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20110272783.pdf [firstpage_image] =>[orig_patent_app_number] => 13090347 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/090347
SEMICONDUCTOR DEVICE WITH BIPOLAR TRANSISTOR AND CAPACITOR Apr 19, 2011 Abandoned
Array ( [id] => 8462589 [patent_doc_number] => 20120267757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'CAPACITOR STRUCTURE WITH METAL BILAYER AND METHOD FOR USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/090277 [patent_app_country] => US [patent_app_date] => 2011-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2612 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13090277 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/090277
Capacitor structure with metal bilayer and method for using the same Apr 19, 2011 Issued
Array ( [id] => 9112955 [patent_doc_number] => 08569124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'Method of manufacturing compound semiconductor device with gate electrode forming before source electrode and drain electrode' [patent_app_type] => utility [patent_app_number] => 13/089981 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 82 [patent_no_of_words] => 21701 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13089981 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089981
Method of manufacturing compound semiconductor device with gate electrode forming before source electrode and drain electrode Apr 18, 2011 Issued
Array ( [id] => 9711545 [patent_doc_number] => 08836120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Semiconductor device with a layer including niobium, and/or tantalum overlying a contact pad or a metal layer' [patent_app_type] => utility [patent_app_number] => 13/090092 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4918 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13090092 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/090092
Semiconductor device with a layer including niobium, and/or tantalum overlying a contact pad or a metal layer Apr 18, 2011 Issued
Array ( [id] => 8760615 [patent_doc_number] => 08421138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Magnetic tunneling junction device with recessed magnetic free layer' [patent_app_type] => utility [patent_app_number] => 13/089534 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 4933 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13089534 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089534
Magnetic tunneling junction device with recessed magnetic free layer Apr 18, 2011 Issued
Array ( [id] => 9227896 [patent_doc_number] => 08633566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-21 [patent_title] => 'Memory cell repair' [patent_app_type] => utility [patent_app_number] => 13/089967 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4301 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13089967 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089967
Memory cell repair Apr 18, 2011 Issued
Array ( [id] => 8462427 [patent_doc_number] => 20120267596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/089880 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4075 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13089880 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089880
Non-volatile memory with oxygen vacancy barrier layer Apr 18, 2011 Issued
Array ( [id] => 7506815 [patent_doc_number] => 20110254152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'CHIP STRUCTURE, CHIP BONDING STRUCTURE USING THE SAME, AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/089449 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1926 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20110254152.pdf [firstpage_image] =>[orig_patent_app_number] => 13089449 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089449
CHIP STRUCTURE, CHIP BONDING STRUCTURE USING THE SAME, AND MANUFACTURING METHOD THEREOF Apr 18, 2011 Abandoned
Array ( [id] => 7506816 [patent_doc_number] => 20110254153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'DIE STRUCTURE AND DIE CONNECTING METHOD' [patent_app_type] => utility [patent_app_number] => 13/089480 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 1973 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20110254153.pdf [firstpage_image] =>[orig_patent_app_number] => 13089480 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089480
Die structure and die connecting method Apr 18, 2011 Issued
Array ( [id] => 8944003 [patent_doc_number] => 08497182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-30 [patent_title] => 'Sidewall thin film electrode with self-aligned top electrode and programmable resistance memory' [patent_app_type] => utility [patent_app_number] => 13/089934 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 24 [patent_no_of_words] => 6850 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13089934 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089934
Sidewall thin film electrode with self-aligned top electrode and programmable resistance memory Apr 18, 2011 Issued
Array ( [id] => 7558968 [patent_doc_number] => 20110272799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'IC CHIP AND IC CHIP MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/089438 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1926 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20110272799.pdf [firstpage_image] =>[orig_patent_app_number] => 13089438 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089438
IC CHIP AND IC CHIP MANUFACTURING METHOD THEREOF Apr 18, 2011 Abandoned
Array ( [id] => 7773118 [patent_doc_number] => 20120038004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/089743 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 9093 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20120038004.pdf [firstpage_image] =>[orig_patent_app_number] => 13089743 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089743
Semiconductor device having stressor film and method of manufacturing semiconductor device Apr 18, 2011 Issued
Array ( [id] => 9009847 [patent_doc_number] => 08525147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-03 [patent_title] => 'Semiconductor devices including a transistor with elastic channel' [patent_app_type] => utility [patent_app_number] => 13/089477 [patent_app_country] => US [patent_app_date] => 2011-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 9807 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13089477 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/089477
Semiconductor devices including a transistor with elastic channel Apr 18, 2011 Issued
Array ( [id] => 6153664 [patent_doc_number] => 20110156209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'MULTIPLE ELECTRODE LAYER BACKEND STACKED CAPACITOR' [patent_app_type] => utility [patent_app_number] => 13/043066 [patent_app_country] => US [patent_app_date] => 2011-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4006 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20110156209.pdf [firstpage_image] =>[orig_patent_app_number] => 13043066 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043066
Multiple electrode layer backend stacked capacitor Mar 7, 2011 Issued
Array ( [id] => 8344803 [patent_doc_number] => 20120205730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'TRANSPARENT CONDUCTIVE FILM FOR IMPROVING CHARGE TRANSFER IN BACKSIDE ILLUMINATED IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 13/026994 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6595 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13026994 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026994
Apparatus and method for improving charge transfer in backside illuminated image sensor Feb 13, 2011 Issued
Array ( [id] => 8621771 [patent_doc_number] => 08354685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-15 [patent_title] => 'Semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 13/026633 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 8615 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13026633 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026633
Semiconductor light emitting device Feb 13, 2011 Issued
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