Idriss N. Alrobaye

Array ( [id] => 156218 [patent_doc_number] => 07681020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-16 [patent_title] => 'Context switching and synchronization' [patent_app_type] => utility [patent_app_number] => 11/736936 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 12085 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/681/07681020.pdf [firstpage_image] =>[orig_patent_app_number] => 11736936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4888989 [patent_doc_number] => 20080263321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'Universal Register Rename Mechanism for Targets of Different Instruction Types in a Microprocessor' [patent_app_type] => utility [patent_app_number] => 11/736844 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8689 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20080263321.pdf [firstpage_image] =>[orig_patent_app_number] => 11736844 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4888999 [patent_doc_number] => 20080263331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'Universal Register Rename Mechanism for Instructions with Multiple Targets in a Microprocessor' [patent_app_type] => utility [patent_app_number] => 11/736855 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9147 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20080263331.pdf [firstpage_image] =>[orig_patent_app_number] => 11736855 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4889055 [patent_doc_number] => 20080263387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'FAULT RECOVERY ON A PARALLEL COMPUTER SYSTEM WITH A TORUS NETWORK' [patent_app_type] => utility [patent_app_number] => 11/736923 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5197 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20080263387.pdf [firstpage_image] =>[orig_patent_app_number] => 11736923 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4665472 [patent_doc_number] => 20080256379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Clock architecture for multi-processor systems' [patent_app_type] => utility [patent_app_number] => 11/786125 [patent_app_country] => US [patent_app_date] => 2007-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3263 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20080256379.pdf [firstpage_image] =>[orig_patent_app_number] => 11786125 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5248892 [patent_doc_number] => 20070245126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'Program counter of microcontroller and control method thereof' [patent_app_type] => utility [patent_app_number] => 11/783415 [patent_app_country] => US [patent_app_date] => 2007-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1420 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20070245126.pdf [firstpage_image] =>[orig_patent_app_number] => 11783415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 126754 [patent_doc_number] => 07711933 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-05-04 [patent_title] => 'Exploiting unused configuration memory cells' [patent_app_type] => utility [patent_app_number] => 11/784848 [patent_app_country] => US [patent_app_date] => 2007-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2913 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/711/07711933.pdf [firstpage_image] =>[orig_patent_app_number] => 11784848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4825951 [patent_doc_number] => 20080229075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'MICROCONTROLLER WITH LOW-COST DIGITAL SIGNAL PROCESSING EXTENSIONS' [patent_app_type] => utility [patent_app_number] => 11/687264 [patent_app_country] => US [patent_app_date] => 2007-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9717 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20080229075.pdf [firstpage_image] =>[orig_patent_app_number] => 11687264 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4825961 [patent_doc_number] => 20080229083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'Processor instruction set' [patent_app_type] => utility [patent_app_number] => 11/717616 [patent_app_country] => US [patent_app_date] => 2007-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10463 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20080229083.pdf [firstpage_image] =>[orig_patent_app_number] => 11717616 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4825944 [patent_doc_number] => 20080229069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'System, Method And Software To Preload Instructions From An Instruction Set Other Than One Currently Executing' [patent_app_type] => utility [patent_app_number] => 11/685850 [patent_app_country] => US [patent_app_date] => 2007-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3530 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20080229069.pdf [firstpage_image] =>[orig_patent_app_number] => 11685850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4572575 [patent_doc_number] => 07962717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Message routing scheme' [patent_app_type] => utility [patent_app_number] => 11/717621 [patent_app_country] => US [patent_app_date] => 2007-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5612 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/962/07962717.pdf [firstpage_image] =>[orig_patent_app_number] => 11717621 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4576678 [patent_doc_number] => 07822953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Protection of a program against a trap' [patent_app_type] => utility [patent_app_number] => 11/717225 [patent_app_country] => US [patent_app_date] => 2007-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3896 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/822/07822953.pdf [firstpage_image] =>[orig_patent_app_number] => 11717225 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7690019 [patent_doc_number] => 20070234014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Processor apparatus for executing instructions with local slack prediction of instructions and processing method therefor' [patent_app_type] => utility [patent_app_number] => 11/717063 [patent_app_country] => US [patent_app_date] => 2007-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 46325 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20070234014.pdf [firstpage_image] =>[orig_patent_app_number] => 11717063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4825918 [patent_doc_number] => 20080229062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'Method of sharing registers in a processor and processor' [patent_app_type] => utility [patent_app_number] => 11/716990 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4972 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20080229062.pdf [firstpage_image] =>[orig_patent_app_number] => 11716990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 163320 [patent_doc_number] => 07676658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-09 [patent_title] => 'Data processing apparatus configured to load a program corresponding to each of a plurality of functions into a memory and execute the loaded program, and method for loading programs in the data processing apparatus' [patent_app_type] => utility [patent_app_number] => 11/684905 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 12524 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/676/07676658.pdf [firstpage_image] =>[orig_patent_app_number] => 11684905 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4700208 [patent_doc_number] => 20080222392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'Method and arrangements for pipeline processing of instructions' [patent_app_type] => utility [patent_app_number] => 11/716153 [patent_app_country] => US [patent_app_date] => 2007-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11300 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20080222392.pdf [firstpage_image] =>[orig_patent_app_number] => 11716153 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4700209 [patent_doc_number] => 20080222393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'Method and arrangements for pipeline processing of instructions' [patent_app_type] => utility [patent_app_number] => 11/716373 [patent_app_country] => US [patent_app_date] => 2007-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11223 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20080222393.pdf [firstpage_image] =>[orig_patent_app_number] => 11716373 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 234887 [patent_doc_number] => 07600099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'System and method for predictive early allocation of stores in a microprocessor' [patent_app_type] => utility [patent_app_number] => 11/683843 [patent_app_country] => US [patent_app_date] => 2007-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3990 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/600/07600099.pdf [firstpage_image] =>[orig_patent_app_number] => 11683843 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8208015 [patent_doc_number] => 08190861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Micro-sequence based security model' [patent_app_type] => utility [patent_app_number] => 11/677367 [patent_app_country] => US [patent_app_date] => 2007-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4728 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/190/08190861.pdf [firstpage_image] =>[orig_patent_app_number] => 11677367 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5221416 [patent_doc_number] => 20070162728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Information processing apparatus, replacing method, and computer-readable recording medium on which a replacing program is recorded' [patent_app_type] => utility [patent_app_number] => 11/703225 [patent_app_country] => US [patent_app_date] => 2007-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11787 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20070162728.pdf [firstpage_image] =>[orig_patent_app_number] => 11703225 [rel_patent_id] =>[rel_patent_doc_number] =>)