
Idriss N. Alrobaye
Supervisory Patent Examiner (ID: 8005, Phone: (571)270-1023 , Office: P/2181 )
| Most Active Art Unit | 2183 |
| Art Unit(s) | 2183, 2181 |
| Total Applications | 289 |
| Issued Applications | 199 |
| Pending Applications | 18 |
| Abandoned Applications | 75 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 180050
[patent_doc_number] => 07657766
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[patent_kind] => B2
[patent_issue_date] => 2010-02-02
[patent_title] => 'Apparatus for an energy efficient clustered micro-architecture'
[patent_app_type] => utility
[patent_app_number] => 11/698612
[patent_app_country] => US
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[pdf_file] => patents/07/657/07657766.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/698612 | Apparatus for an energy efficient clustered micro-architecture | Jan 25, 2007 | Issued |
Array
(
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[patent_doc_number] => 20070226461
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[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'Reverse polish notation device for handling tables, and electronic integrated circuit including such a processing device'
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Array
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[patent_doc_number] => 20080114969
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[patent_title] => 'Instructions for efficiently accessing unaligned partial vectors'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/655656 | Instructions for efficiently accessing unaligned partial vectors | Jan 17, 2007 | Issued |
Array
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[patent_doc_number] => 20080162879
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[patent_issue_date] => 2008-07-03
[patent_title] => 'Methods and apparatuses for aligning and/or executing instructions'
[patent_app_type] => utility
[patent_app_number] => 11/648156
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Array
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[patent_app_number] => 11/648187
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Array
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Array
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[patent_title] => 'Prediction of data values read from memory by a microprocessor using a dynamic confidence threshold'
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Array
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[patent_title] => 'System and method for implementing a zero overhead loop'
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Array
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Array
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[patent_title] => 'System and method for efficiently performing bit-field extraction and bit-field combination operations in a processor'
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Array
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Array
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Array
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Array
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Array
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