Iftekhar A. Khan

Array ( [id] => 13043361 [patent_doc_number] => 10043822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-07 [patent_title] => Semiconductor memory devices having vertical pillars that are electrically connected to lower contacts [patent_app_type] => utility [patent_app_number] => 15/706861 [patent_app_country] => US [patent_app_date] => 2017-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 33 [patent_no_of_words] => 16553 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15706861 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12122377 [patent_doc_number] => 20180005963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Transient Electronic Device With Ion-Exchanged Glass Treated Interposer' [patent_app_type] => utility [patent_app_number] => 15/689566 [patent_app_country] => US [patent_app_date] => 2017-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7067 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15689566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16301329 [patent_doc_number] => 20200287052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => DUAL-GATE THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/780926 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15780926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15657347 [patent_doc_number] => 20200091204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, DISPLAY PANEL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/747722 [patent_app_country] => US [patent_app_date] => 2017-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15747722 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15657323 [patent_doc_number] => 20200091192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => ARRAY SUBSTRATES, DISPLAY PANELS, AND DISPLAY APPARATUSES [patent_app_type] => utility [patent_app_number] => 15/750831 [patent_app_country] => US [patent_app_date] => 2017-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15750831 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12027205 [patent_doc_number] => 20170317304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'AMBIPOLAR SYNAPTIC DEVICES' [patent_app_type] => utility [patent_app_number] => 15/650874 [patent_app_country] => US [patent_app_date] => 2017-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9136 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15650874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12005584 [patent_doc_number] => 20170309739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'Semiconductor Device Having First and Second Circuits Integrated in a Semiconductor Body' [patent_app_type] => utility [patent_app_number] => 15/646496 [patent_app_country] => US [patent_app_date] => 2017-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5409 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15646496 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16545276 [patent_doc_number] => 20200411691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => DIVERSE TRANSISTOR CHANNEL MATERIALS ENABLED BY THIN, INVERSE-GRADED, GERMANIUM-BASED LAYER [patent_app_type] => utility [patent_app_number] => 16/611921 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20360 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16611921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15625909 [patent_doc_number] => 20200083359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => NON-PLANAR TRANSITION METAL DICHALCOGENIDE DEVICES [patent_app_type] => utility [patent_app_number] => 16/613751 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16613751 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12109096 [patent_doc_number] => 09865583 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-01-09 [patent_title] => 'Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including snake open configured fill cells, and the second DOE including stitch open configured fill cells' [patent_app_type] => utility [patent_app_number] => 15/635595 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 114 [patent_figures_cnt] => 219 [patent_no_of_words] => 52327 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 434 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15635595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14587959 [patent_doc_number] => 20190221588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/580240 [patent_app_country] => US [patent_app_date] => 2017-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15580240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14955581 [patent_doc_number] => 10439071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Thin film transistors and the manufacturing methods thereof, and array substrates [patent_app_type] => utility [patent_app_number] => 15/542630 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2011 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15542630 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13482351 [patent_doc_number] => 20180292718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => ARRAY SUBSTRATE AND METHOD OF FABRICATING THE ARRAY SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/547580 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4620 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15547580 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15428171 [patent_doc_number] => 10547025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 15/623215 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6201 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623215 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14367233 [patent_doc_number] => 10304931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Polarization-doped enhancement mode HEMT [patent_app_type] => utility [patent_app_number] => 15/623371 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2373 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12122686 [patent_doc_number] => 20180006272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/623128 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 13000 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13242951 [patent_doc_number] => 10134684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Patterned shield structure [patent_app_type] => utility [patent_app_number] => 15/623370 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3754 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14617313 [patent_doc_number] => 10361364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Co-fabrication of magnetic device structures with electrical interconnects having reduced resistance through increased conductor grain size [patent_app_type] => utility [patent_app_number] => 15/622668 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 7363 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15622668 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13769493 [patent_doc_number] => 10177096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Semiconductor package and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/622708 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 9861 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15622708 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12208439 [patent_doc_number] => 20180053665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'PRE-BUMPED REDISTRIBUTION LAYER STRUCTURE AND SEMICONDUCTOR PACKAGE INCORPORATING SUCH PRE-BUMPED REDISTRIBUTION LAYER STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/623361 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3245 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623361 [rel_patent_id] =>[rel_patent_doc_number] =>)