Search

Iftekhar A. Khan

Examiner (ID: 2808, Phone: (571)272-5699 , Office: P/2128 )

Most Active Art Unit
2128
Art Unit(s)
2127, 2128, 2146, 2123, 2187
Total Applications
617
Issued Applications
452
Pending Applications
59
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7656911 [patent_doc_number] => 20110306180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-15 [patent_title] => 'Systems, Methods and Products Involving Aspects of Laser Irradiation, Cleaving, and/or Bonding Silicon-Containing Material to Substrates' [patent_app_type] => utility [patent_app_number] => 13/160476 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7669 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0306/20110306180.pdf [firstpage_image] =>[orig_patent_app_number] => 13160476 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/160476
Systems, Methods and Products Involving Aspects of Laser Irradiation, Cleaving, and/or Bonding Silicon-Containing Material to Substrates Jun 13, 2011 Abandoned
Array ( [id] => 8522818 [patent_doc_number] => 20120322227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'METHOD FOR CONTROLLED LAYER TRANSFER' [patent_app_type] => utility [patent_app_number] => 13/159893 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5616 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13159893 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/159893
Method for controlled layer transfer Jun 13, 2011 Issued
Array ( [id] => 9676802 [patent_doc_number] => 08815711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Manufacturing apparatus and method for semiconductor device and cleaning method of manufacturing apparatus for semiconductor' [patent_app_type] => utility [patent_app_number] => 13/160209 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3971 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13160209 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/160209
Manufacturing apparatus and method for semiconductor device and cleaning method of manufacturing apparatus for semiconductor Jun 13, 2011 Issued
Array ( [id] => 10118613 [patent_doc_number] => 09153501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/160460 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 47 [patent_no_of_words] => 8615 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13160460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/160460
Method for manufacturing semiconductor device Jun 13, 2011 Issued
Array ( [id] => 8522813 [patent_doc_number] => 20120322221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'MOLYBDENUM OXIDE TOP ELECTRODE FOR DRAM CAPACITORS' [patent_app_type] => utility [patent_app_number] => 13/160132 [patent_app_country] => US [patent_app_date] => 2011-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6096 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13160132 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/160132
Molybdenum oxide top electrode for DRAM capacitors Jun 13, 2011 Issued
Array ( [id] => 9762208 [patent_doc_number] => 08846530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Method for forming semiconductor region and method for manufacturing power storage device' [patent_app_type] => utility [patent_app_number] => 13/158629 [patent_app_country] => US [patent_app_date] => 2011-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 9101 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13158629 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/158629
Method for forming semiconductor region and method for manufacturing power storage device Jun 12, 2011 Issued
Array ( [id] => 8749401 [patent_doc_number] => 08415233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Wafer processing' [patent_app_type] => utility [patent_app_number] => 13/158997 [patent_app_country] => US [patent_app_date] => 2011-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5446 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13158997 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/158997
Wafer processing Jun 12, 2011 Issued
Array ( [id] => 8784600 [patent_doc_number] => 08431443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'Metallic solderability preservation coating on metal part of semiconductor package to prevent oxide' [patent_app_type] => utility [patent_app_number] => 13/156257 [patent_app_country] => US [patent_app_date] => 2011-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4475 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13156257 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/156257
Metallic solderability preservation coating on metal part of semiconductor package to prevent oxide Jun 7, 2011 Issued
Array ( [id] => 8796998 [patent_doc_number] => 08435865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Method of manufacturing super-junction semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/110426 [patent_app_country] => US [patent_app_date] => 2011-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 4356 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13110426 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/110426
Method of manufacturing super-junction semiconductor device May 17, 2011 Issued
Array ( [id] => 8370679 [patent_doc_number] => 20120220069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'METHOD OF PRODUCING CONDUCTIVE THIN FILM' [patent_app_type] => utility [patent_app_number] => 13/110862 [patent_app_country] => US [patent_app_date] => 2011-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3167 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13110862 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/110862
Method of producing conductive thin film May 17, 2011 Issued
Array ( [id] => 8755631 [patent_doc_number] => 20130089936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/700976 [patent_app_country] => US [patent_app_date] => 2011-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5415 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13700976 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/700976
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE May 16, 2011 Abandoned
Array ( [id] => 8824931 [patent_doc_number] => 20130125976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'Solar cell and method of manufacturing such a solar cell' [patent_app_type] => utility [patent_app_number] => 13/697732 [patent_app_country] => US [patent_app_date] => 2011-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6358 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13697732 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/697732
Solar cell and method of its manufacture May 9, 2011 Issued
Array ( [id] => 7567540 [patent_doc_number] => 20110287603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/102578 [patent_app_country] => US [patent_app_date] => 2011-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8592 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20110287603.pdf [firstpage_image] =>[orig_patent_app_number] => 13102578 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/102578
METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE May 5, 2011 Abandoned
Array ( [id] => 9239117 [patent_doc_number] => 08603908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Mitigation of silicide formation on wafer bevel' [patent_app_type] => utility [patent_app_number] => 13/102923 [patent_app_country] => US [patent_app_date] => 2011-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4009 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13102923 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/102923
Mitigation of silicide formation on wafer bevel May 5, 2011 Issued
Array ( [id] => 8252527 [patent_doc_number] => 20120156849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/102760 [patent_app_country] => US [patent_app_date] => 2011-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3818 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20120156849.pdf [firstpage_image] =>[orig_patent_app_number] => 13102760 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/102760
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE May 5, 2011 Abandoned
Array ( [id] => 7561333 [patent_doc_number] => 20110275166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'SYSTEMS AND METHODS FOR THIN-FILM DEPOSITION OF METAL OXIDES USING EXCITED NITROGEN-OXYGEN SPECIES' [patent_app_type] => utility [patent_app_number] => 13/102980 [patent_app_country] => US [patent_app_date] => 2011-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10500 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20110275166.pdf [firstpage_image] =>[orig_patent_app_number] => 13102980 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/102980
Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species May 5, 2011 Issued
Array ( [id] => 9589273 [patent_doc_number] => 08778813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'Confined process volume PECVD chamber' [patent_app_type] => utility [patent_app_number] => 13/102846 [patent_app_country] => US [patent_app_date] => 2011-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3997 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13102846 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/102846
Confined process volume PECVD chamber May 5, 2011 Issued
Array ( [id] => 7561373 [patent_doc_number] => 20110275206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/102542 [patent_app_country] => US [patent_app_date] => 2011-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3772 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20110275206.pdf [firstpage_image] =>[orig_patent_app_number] => 13102542 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/102542
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE May 5, 2011 Abandoned
Array ( [id] => 9427477 [patent_doc_number] => 08703551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Process flow to reduce hole defects in P-active regions and to reduce across-wafer threshold voltage scatter' [patent_app_type] => utility [patent_app_number] => 13/102680 [patent_app_country] => US [patent_app_date] => 2011-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 5332 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13102680 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/102680
Process flow to reduce hole defects in P-active regions and to reduce across-wafer threshold voltage scatter May 5, 2011 Issued
Array ( [id] => 8430349 [patent_doc_number] => 20120252225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'SEMICONDUCTOR FABRICATION METHOD' [patent_app_type] => utility [patent_app_number] => 13/140549 [patent_app_country] => US [patent_app_date] => 2011-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1271 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13140549 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/140549
SEMICONDUCTOR FABRICATION METHOD Apr 10, 2011 Abandoned
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