Search

Iftekhar A. Khan

Examiner (ID: 2808, Phone: (571)272-5699 , Office: P/2128 )

Most Active Art Unit
2128
Art Unit(s)
2127, 2128, 2146, 2123, 2187
Total Applications
617
Issued Applications
452
Pending Applications
59
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5416461 [patent_doc_number] => 20090042348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/182322 [patent_app_country] => US [patent_app_date] => 2008-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 16324 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20090042348.pdf [firstpage_image] =>[orig_patent_app_number] => 12182322 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/182322
Method for manufacturing semiconductor device Jul 29, 2008 Issued
Array ( [id] => 8762197 [patent_doc_number] => 08422727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Electro-acoustical transducer' [patent_app_type] => utility [patent_app_number] => 12/181073 [patent_app_country] => US [patent_app_date] => 2008-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 15943 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 507 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12181073 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/181073
Electro-acoustical transducer Jul 27, 2008 Issued
Array ( [id] => 5484572 [patent_doc_number] => 20090274337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'SPEAKER VOICE COIL' [patent_app_type] => utility [patent_app_number] => 12/180734 [patent_app_country] => US [patent_app_date] => 2008-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2165 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20090274337.pdf [firstpage_image] =>[orig_patent_app_number] => 12180734 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/180734
SPEAKER VOICE COIL Jul 27, 2008 Abandoned
Array ( [id] => 5354357 [patent_doc_number] => 20090185701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-23 [patent_title] => 'FLEXIBLE PIEZOELECTRIC SOUND-GENERATING DEVICES' [patent_app_type] => utility [patent_app_number] => 12/169569 [patent_app_country] => US [patent_app_date] => 2008-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3103 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20090185701.pdf [firstpage_image] =>[orig_patent_app_number] => 12169569 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/169569
Flexible piezoelectric sound-generating devices Jul 7, 2008 Issued
Array ( [id] => 91912 [patent_doc_number] => 07732265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Thin film transistor, method for manufacturing the same and film formation apparatus' [patent_app_type] => utility [patent_app_number] => 12/132511 [patent_app_country] => US [patent_app_date] => 2008-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4306 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/732/07732265.pdf [firstpage_image] =>[orig_patent_app_number] => 12132511 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/132511
Thin film transistor, method for manufacturing the same and film formation apparatus Jun 2, 2008 Issued
Array ( [id] => 4711163 [patent_doc_number] => 20080299689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'Method for manufacturing semiconductor device and display device' [patent_app_type] => utility [patent_app_number] => 12/153722 [patent_app_country] => US [patent_app_date] => 2008-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14074 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20080299689.pdf [firstpage_image] =>[orig_patent_app_number] => 12153722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/153722
Method for manufacturing semiconductor device and display device May 22, 2008 Issued
Array ( [id] => 4719479 [patent_doc_number] => 20080242002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'Apparatus and Methods for Cooling Semiconductor Integrated Circuit Package Structures' [patent_app_type] => utility [patent_app_number] => 12/115332 [patent_app_country] => US [patent_app_date] => 2008-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8626 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20080242002.pdf [firstpage_image] =>[orig_patent_app_number] => 12115332 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/115332
Apparatus and methods for cooling semiconductor integrated circuit package structures May 4, 2008 Issued
Array ( [id] => 4949493 [patent_doc_number] => 20080305619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-11 [patent_title] => 'METHOD OF FORMING GROUP IV SEMICONDUCTOR JUNCTIONS USING LASER PROCESSING' [patent_app_type] => utility [patent_app_number] => 12/114141 [patent_app_country] => US [patent_app_date] => 2008-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5370 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0305/20080305619.pdf [firstpage_image] =>[orig_patent_app_number] => 12114141 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/114141
METHOD OF FORMING GROUP IV SEMICONDUCTOR JUNCTIONS USING LASER PROCESSING May 1, 2008 Abandoned
Array ( [id] => 7724249 [patent_doc_number] => 08097519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-17 [patent_title] => 'SOI device having a substrate diode formed by reduced implantation energy' [patent_app_type] => utility [patent_app_number] => 12/113271 [patent_app_country] => US [patent_app_date] => 2008-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 7566 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/097/08097519.pdf [firstpage_image] =>[orig_patent_app_number] => 12113271 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/113271
SOI device having a substrate diode formed by reduced implantation energy Apr 30, 2008 Issued
Array ( [id] => 4839905 [patent_doc_number] => 20080280391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'METHODS OF MANUFACTURING MOS TRANSISTORS WITH STRAINED CHANNEL REGIONS' [patent_app_type] => utility [patent_app_number] => 12/112562 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14648 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20080280391.pdf [firstpage_image] =>[orig_patent_app_number] => 12112562 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/112562
METHODS OF MANUFACTURING MOS TRANSISTORS WITH STRAINED CHANNEL REGIONS Apr 29, 2008 Abandoned
Array ( [id] => 9608085 [patent_doc_number] => 08785250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Methods and apparatus for flip-chip-on-lead semiconductor package' [patent_app_type] => utility [patent_app_number] => 12/112192 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 2520 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12112192 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/112192
Methods and apparatus for flip-chip-on-lead semiconductor package Apr 29, 2008 Issued
Array ( [id] => 4719544 [patent_doc_number] => 20080242067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/111512 [patent_app_country] => US [patent_app_date] => 2008-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7067 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20080242067.pdf [firstpage_image] =>[orig_patent_app_number] => 12111512 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/111512
SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE THEREOF Apr 28, 2008 Abandoned
Array ( [id] => 4727375 [patent_doc_number] => 20080206919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'METHOD OF MANUFACTURE OF A MICROLENS STRUCTURE FOR OPTO-ELECTRIC SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/111061 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2711 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20080206919.pdf [firstpage_image] =>[orig_patent_app_number] => 12111061 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/111061
METHOD OF MANUFACTURE OF A MICROLENS STRUCTURE FOR OPTO-ELECTRIC SEMICONDUCTOR DEVICE Apr 27, 2008 Abandoned
Array ( [id] => 9099566 [patent_doc_number] => 08563441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Methods for fabricating memory cells having fin structures with smooth sidewalls and rounded top corners and edges' [patent_app_type] => utility [patent_app_number] => 12/111122 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4375 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12111122 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/111122
Methods for fabricating memory cells having fin structures with smooth sidewalls and rounded top corners and edges Apr 27, 2008 Issued
Array ( [id] => 4839942 [patent_doc_number] => 20080280428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/109512 [patent_app_country] => US [patent_app_date] => 2008-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7471 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20080280428.pdf [firstpage_image] =>[orig_patent_app_number] => 12109512 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109512
Method of manufacturing semiconductor device Apr 24, 2008 Issued
Array ( [id] => 9582166 [patent_doc_number] => 08772169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Technique for controlling trench profile in semiconductor structures' [patent_app_type] => utility [patent_app_number] => 12/109302 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4869 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12109302 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109302
Technique for controlling trench profile in semiconductor structures Apr 23, 2008 Issued
Array ( [id] => 9582166 [patent_doc_number] => 08772169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Technique for controlling trench profile in semiconductor structures' [patent_app_type] => utility [patent_app_number] => 12/109302 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4869 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12109302 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109302
Technique for controlling trench profile in semiconductor structures Apr 23, 2008 Issued
Array ( [id] => 9582166 [patent_doc_number] => 08772169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Technique for controlling trench profile in semiconductor structures' [patent_app_type] => utility [patent_app_number] => 12/109302 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4869 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12109302 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109302
Technique for controlling trench profile in semiconductor structures Apr 23, 2008 Issued
Array ( [id] => 32513 [patent_doc_number] => 07790564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Methods for fabricating active devices on a semiconductor-on-insulator substrate utilizing multiple depth shallow trench isolations' [patent_app_type] => utility [patent_app_number] => 12/108851 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5237 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/790/07790564.pdf [firstpage_image] =>[orig_patent_app_number] => 12108851 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/108851
Methods for fabricating active devices on a semiconductor-on-insulator substrate utilizing multiple depth shallow trench isolations Apr 23, 2008 Issued
Array ( [id] => 9582166 [patent_doc_number] => 08772169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Technique for controlling trench profile in semiconductor structures' [patent_app_type] => utility [patent_app_number] => 12/109302 [patent_app_country] => US [patent_app_date] => 2008-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4869 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12109302 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109302
Technique for controlling trench profile in semiconductor structures Apr 23, 2008 Issued
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