Search

Iftekhar A. Khan

Examiner (ID: 2808, Phone: (571)272-5699 , Office: P/2128 )

Most Active Art Unit
2128
Art Unit(s)
2127, 2128, 2146, 2123, 2187
Total Applications
617
Issued Applications
452
Pending Applications
59
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4866940 [patent_doc_number] => 20080145999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/954472 [patent_app_country] => US [patent_app_date] => 2007-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4505 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20080145999.pdf [firstpage_image] =>[orig_patent_app_number] => 11954472 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/954472
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE Dec 11, 2007 Abandoned
Array ( [id] => 5422528 [patent_doc_number] => 20090148983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'Method of Manufacturing Flexible Semiconductor Assemblies' [patent_app_type] => utility [patent_app_number] => 11/953541 [patent_app_country] => US [patent_app_date] => 2007-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4798 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20090148983.pdf [firstpage_image] =>[orig_patent_app_number] => 11953541 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/953541
Method of manufacturing flexible semiconductor assemblies Dec 9, 2007 Issued
Array ( [id] => 4464112 [patent_doc_number] => 07935583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Fabrication method of pixel structure' [patent_app_type] => utility [patent_app_number] => 11/951321 [patent_app_country] => US [patent_app_date] => 2007-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3626 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/935/07935583.pdf [firstpage_image] =>[orig_patent_app_number] => 11951321 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/951321
Fabrication method of pixel structure Dec 4, 2007 Issued
Array ( [id] => 8591827 [patent_doc_number] => 08349703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Method of bonding two substrates' [patent_app_type] => utility [patent_app_number] => 12/525493 [patent_app_country] => US [patent_app_date] => 2007-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 6904 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12525493 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/525493
Method of bonding two substrates Nov 22, 2007 Issued
Array ( [id] => 4719561 [patent_doc_number] => 20080242084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'METHOD FOR PLANARIZING AN INSULATION LAYER IN A SEMICONDUCTOR DEVICE CAPABLE OF OMITTING A MASK PROCESS AND AN ETCHING PROCESS' [patent_app_type] => utility [patent_app_number] => 11/939631 [patent_app_country] => US [patent_app_date] => 2007-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2405 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20080242084.pdf [firstpage_image] =>[orig_patent_app_number] => 11939631 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/939631
METHOD FOR PLANARIZING AN INSULATION LAYER IN A SEMICONDUCTOR DEVICE CAPABLE OF OMITTING A MASK PROCESS AND AN ETCHING PROCESS Nov 13, 2007 Abandoned
Array ( [id] => 4904067 [patent_doc_number] => 20080113480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/939941 [patent_app_country] => US [patent_app_date] => 2007-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7908 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20080113480.pdf [firstpage_image] =>[orig_patent_app_number] => 11939941 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/939941
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Nov 13, 2007 Abandoned
Array ( [id] => 4569226 [patent_doc_number] => 07858517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Method of manufacturing semiconductor device, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/939251 [patent_app_country] => US [patent_app_date] => 2007-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 5461 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/858/07858517.pdf [firstpage_image] =>[orig_patent_app_number] => 11939251 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/939251
Method of manufacturing semiconductor device, and semiconductor device Nov 12, 2007 Issued
Array ( [id] => 5410198 [patent_doc_number] => 20090124097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'METHOD OF FORMING NARROW FINS IN FINFET DEVICES WITH REDUCED SPACING THEREBETWEEN' [patent_app_type] => utility [patent_app_number] => 11/937641 [patent_app_country] => US [patent_app_date] => 2007-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2085 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20090124097.pdf [firstpage_image] =>[orig_patent_app_number] => 11937641 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/937641
METHOD OF FORMING NARROW FINS IN FINFET DEVICES WITH REDUCED SPACING THEREBETWEEN Nov 8, 2007 Abandoned
Array ( [id] => 4900990 [patent_doc_number] => 20080110402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'SUSCEPTOR AND METHOD OF FORMING A LED DEVICE USING SUCH SUSCEPTOR' [patent_app_type] => utility [patent_app_number] => 11/938085 [patent_app_country] => US [patent_app_date] => 2007-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4943 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20080110402.pdf [firstpage_image] =>[orig_patent_app_number] => 11938085 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/938085
SUSCEPTOR AND METHOD OF FORMING A LED DEVICE USING SUCH SUSCEPTOR Nov 8, 2007 Abandoned
Array ( [id] => 5265017 [patent_doc_number] => 20090117702 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'Method of Forming an Inductor on a Semiconductor Wafer' [patent_app_type] => utility [patent_app_number] => 11/936461 [patent_app_country] => US [patent_app_date] => 2007-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3039 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20090117702.pdf [firstpage_image] =>[orig_patent_app_number] => 11936461 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/936461
Method of forming an inductor on a semiconductor wafer Nov 6, 2007 Issued
Array ( [id] => 4965357 [patent_doc_number] => 20080108177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 11/936721 [patent_app_country] => US [patent_app_date] => 2007-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8388 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20080108177.pdf [firstpage_image] =>[orig_patent_app_number] => 11936721 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/936721
Semiconductor device Nov 6, 2007 Issued
Array ( [id] => 196566 [patent_doc_number] => 07638379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-29 [patent_title] => 'Vertical-channel junction field-effect transistors having buried gates and methods of making' [patent_app_type] => utility [patent_app_number] => 11/935442 [patent_app_country] => US [patent_app_date] => 2007-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 5568 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/638/07638379.pdf [firstpage_image] =>[orig_patent_app_number] => 11935442 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/935442
Vertical-channel junction field-effect transistors having buried gates and methods of making Nov 5, 2007 Issued
Array ( [id] => 5310323 [patent_doc_number] => 20090017604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/933742 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4461 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20090017604.pdf [firstpage_image] =>[orig_patent_app_number] => 11933742 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/933742
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE Oct 31, 2007 Abandoned
Array ( [id] => 5265023 [patent_doc_number] => 20090117708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-07 [patent_title] => 'METHOD FOR MANUFACTURING SOI SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 11/933882 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7627 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20090117708.pdf [firstpage_image] =>[orig_patent_app_number] => 11933882 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/933882
METHOD FOR MANUFACTURING SOI SUBSTRATE Oct 31, 2007 Abandoned
Array ( [id] => 4833444 [patent_doc_number] => 20080131991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'METHOD OF MANUFACTURING CMOS IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 11/933821 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1284 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20080131991.pdf [firstpage_image] =>[orig_patent_app_number] => 11933821 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/933821
METHOD OF MANUFACTURING CMOS IMAGE SENSOR Oct 31, 2007 Abandoned
Array ( [id] => 5327956 [patent_doc_number] => 20090108433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'MULTILAYER SEMICONDUCTOR DEVICE PACKAGE ASSEMBLY AND METHOD' [patent_app_type] => utility [patent_app_number] => 11/928172 [patent_app_country] => US [patent_app_date] => 2007-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2614 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20090108433.pdf [firstpage_image] =>[orig_patent_app_number] => 11928172 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/928172
MULTILAYER SEMICONDUCTOR DEVICE PACKAGE ASSEMBLY AND METHOD Oct 29, 2007 Abandoned
Array ( [id] => 10028696 [patent_doc_number] => 09070604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Method of fabricating a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/926623 [patent_app_country] => US [patent_app_date] => 2007-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 36 [patent_no_of_words] => 8009 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11926623 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/926623
Method of fabricating a semiconductor device Oct 28, 2007 Issued
Array ( [id] => 6352458 [patent_doc_number] => 20100022038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'Method for evaluating semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 12/311457 [patent_app_country] => US [patent_app_date] => 2007-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4653 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20100022038.pdf [firstpage_image] =>[orig_patent_app_number] => 12311457 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/311457
Method for evaluating semiconductor wafer Oct 17, 2007 Abandoned
Array ( [id] => 5527311 [patent_doc_number] => 20090197388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/869452 [patent_app_country] => US [patent_app_date] => 2007-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 2823 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20090197388.pdf [firstpage_image] =>[orig_patent_app_number] => 11869452 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/869452
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Oct 8, 2007 Abandoned
Array ( [id] => 122694 [patent_doc_number] => 07704844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-27 [patent_title] => 'High performance MOSFET' [patent_app_type] => utility [patent_app_number] => 11/867266 [patent_app_country] => US [patent_app_date] => 2007-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7804 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 447 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/704/07704844.pdf [firstpage_image] =>[orig_patent_app_number] => 11867266 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/867266
High performance MOSFET Oct 3, 2007 Issued
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