
Igwe U. Anya
Examiner (ID: 11819)
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891, 2825, 2829 |
| Total Applications | 1779 |
| Issued Applications | 1524 |
| Pending Applications | 97 |
| Abandoned Applications | 192 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8921385
[patent_doc_number] => 08487325
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-16
[patent_title] => 'Light emitting diode with large viewing angle and fabricating method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/351648
[patent_app_country] => US
[patent_app_date] => 2012-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 2741
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13351648
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/351648 | Light emitting diode with large viewing angle and fabricating method thereof | Jan 16, 2012 | Issued |
Array
(
[id] => 8299000
[patent_doc_number] => 20120181562
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-19
[patent_title] => 'PACKAGE HAVING A LIGHT-EMITTING ELEMENT AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/351812
[patent_app_country] => US
[patent_app_date] => 2012-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3388
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13351812
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/351812 | PACKAGE HAVING A LIGHT-EMITTING ELEMENT AND METHOD OF FABRICATING THE SAME | Jan 16, 2012 | Abandoned |
Array
(
[id] => 8925472
[patent_doc_number] => 20130181232
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-18
[patent_title] => 'Optocoupler with Surface Functional Coating Layer'
[patent_app_type] => utility
[patent_app_number] => 13/352245
[patent_app_country] => US
[patent_app_date] => 2012-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3594
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13352245
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/352245 | Optocoupler with Surface Functional Coating Layer | Jan 16, 2012 | Abandoned |
Array
(
[id] => 8925521
[patent_doc_number] => 20130181281
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-18
[patent_title] => 'Semiconductor Transistor Having Trench Contacts and Method for Forming Therefor'
[patent_app_type] => utility
[patent_app_number] => 13/350972
[patent_app_country] => US
[patent_app_date] => 2012-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7277
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13350972
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/350972 | Semiconductor transistor having trench contacts and method for forming therefor | Jan 15, 2012 | Issued |
Array
(
[id] => 9663017
[patent_doc_number] => 08810001
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-19
[patent_title] => 'Seal ring structure with capacitor'
[patent_app_type] => utility
[patent_app_number] => 13/351151
[patent_app_country] => US
[patent_app_date] => 2012-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4119
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13351151
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/351151 | Seal ring structure with capacitor | Jan 15, 2012 | Issued |
Array
(
[id] => 8925524
[patent_doc_number] => 20130181284
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-18
[patent_title] => 'Method for Forming Self-Aligned Trench Contacts of Semiconductor Components and A Semiconductor Component'
[patent_app_type] => utility
[patent_app_number] => 13/350987
[patent_app_country] => US
[patent_app_date] => 2012-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7747
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13350987
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/350987 | Method for forming self-aligned trench contacts of semiconductor components and a semiconductor component | Jan 15, 2012 | Issued |
Array
(
[id] => 8925503
[patent_doc_number] => 20130181263
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-18
[patent_title] => 'Methods of Forming a Dielectric Cap Layer on a Metal Gate Structure'
[patent_app_type] => utility
[patent_app_number] => 13/350908
[patent_app_country] => US
[patent_app_date] => 2012-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5183
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13350908
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/350908 | Methods of forming a dielectric cap layer on a metal gate structure | Jan 15, 2012 | Issued |
Array
(
[id] => 8925517
[patent_doc_number] => 20130181277
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-07-18
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/350767
[patent_app_country] => US
[patent_app_date] => 2012-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2830
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13350767
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/350767 | Semiconductor device and method for fabricating thereof | Jan 13, 2012 | Issued |
Array
(
[id] => 9316537
[patent_doc_number] => 20140048875
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-20
[patent_title] => 'Asymmetrical Gate MOS Device and Method of Making'
[patent_app_type] => utility
[patent_app_number] => 14/113705
[patent_app_country] => US
[patent_app_date] => 2011-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4000
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14113705
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/113705 | Asymmetrical gate MOS device and method of making | Dec 27, 2011 | Issued |
Array
(
[id] => 8664257
[patent_doc_number] => 08377719
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-19
[patent_title] => 'Drawn dummy FeCAP, via and metal structures'
[patent_app_type] => utility
[patent_app_number] => 13/307829
[patent_app_country] => US
[patent_app_date] => 2011-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 3867
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13307829
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/307829 | Drawn dummy FeCAP, via and metal structures | Nov 29, 2011 | Issued |
Array
(
[id] => 8462440
[patent_doc_number] => 20120267609
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-25
[patent_title] => 'COMPLEMENTARY TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/386581
[patent_app_country] => US
[patent_app_date] => 2011-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5528
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13386581
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/386581 | Complementary tunneling field effect transistor and method for forming the same | Nov 27, 2011 | Issued |
Array
(
[id] => 7805374
[patent_doc_number] => 20120056326
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-08
[patent_title] => 'TITANIUM NITRIDE FILMS'
[patent_app_type] => utility
[patent_app_number] => 13/296018
[patent_app_country] => US
[patent_app_date] => 2011-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5894
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0056/20120056326.pdf
[firstpage_image] =>[orig_patent_app_number] => 13296018
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/296018 | Titanium nitride films | Nov 13, 2011 | Issued |
Array
(
[id] => 8192882
[patent_doc_number] => 20120119283
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-17
[patent_title] => 'METHODS FOR FORMING ETCH STOP LAYERS, SEMICONDUCTOR DEVICES HAVING THE SAME, AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/238319
[patent_app_country] => US
[patent_app_date] => 2011-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 58
[patent_figures_cnt] => 58
[patent_no_of_words] => 21467
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0119/20120119283.pdf
[firstpage_image] =>[orig_patent_app_number] => 13238319
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/238319 | Methods for forming etch stop layers, semiconductor devices having the same, and methods for fabricating semiconductor devices | Sep 20, 2011 | Issued |
Array
(
[id] => 8738780
[patent_doc_number] => 08410551
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-02
[patent_title] => 'Checkerboarded high-voltage vertical transistor layout'
[patent_app_type] => utility
[patent_app_number] => 13/199792
[patent_app_country] => US
[patent_app_date] => 2011-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 3875
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 265
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13199792
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/199792 | Checkerboarded high-voltage vertical transistor layout | Sep 8, 2011 | Issued |
Array
(
[id] => 7660253
[patent_doc_number] => 20110309522
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-22
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE COMPRISING DIFFERENT LEVEL INTERCONNECTION LAYERS CONNECTED BY CONDUCTOR LAYERS INCLUDING CONDUCTOR LAYER FOR REDUNDANCY'
[patent_app_type] => utility
[patent_app_number] => 13/219853
[patent_app_country] => US
[patent_app_date] => 2011-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3908
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0309/20110309522.pdf
[firstpage_image] =>[orig_patent_app_number] => 13219853
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/219853 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE COMPRISING DIFFERENT LEVEL INTERCONNECTION LAYERS CONNECTED BY CONDUCTOR LAYERS INCLUDING CONDUCTOR LAYER FOR REDUNDANCY | Aug 28, 2011 | Abandoned |
Array
(
[id] => 7662894
[patent_doc_number] => 20110312163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-22
[patent_title] => 'Large Area Nanoenabled Macroelectronic Substrates and Uses Therefor'
[patent_app_type] => utility
[patent_app_number] => 13/218286
[patent_app_country] => US
[patent_app_date] => 2011-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 56
[patent_figures_cnt] => 56
[patent_no_of_words] => 39709
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0312/20110312163.pdf
[firstpage_image] =>[orig_patent_app_number] => 13218286
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/218286 | Large area nanoenabled macroelectronic substrates and uses therefor | Aug 24, 2011 | Issued |
Array
(
[id] => 10014133
[patent_doc_number] => 09057144
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-16
[patent_title] => 'Nanostructured films and related methods'
[patent_app_type] => utility
[patent_app_number] => 13/813022
[patent_app_country] => US
[patent_app_date] => 2011-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6559
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13813022
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/813022 | Nanostructured films and related methods | Jul 28, 2011 | Issued |
Array
(
[id] => 8825948
[patent_doc_number] => 20130126993
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-23
[patent_title] => 'ELECTROMECHANICAL TRANSDUCER AND METHOD OF PRODUCING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/813396
[patent_app_country] => US
[patent_app_date] => 2011-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5679
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13813396
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/813396 | ELECTROMECHANICAL TRANSDUCER AND METHOD OF PRODUCING THE SAME | Jul 25, 2011 | Abandoned |
Array
(
[id] => 7561330
[patent_doc_number] => 20110275163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-11-10
[patent_title] => 'Zr-SUBSTITUTED BaTiO3 FILMS'
[patent_app_type] => utility
[patent_app_number] => 13/188258
[patent_app_country] => US
[patent_app_date] => 2011-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9026
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0275/20110275163.pdf
[firstpage_image] =>[orig_patent_app_number] => 13188258
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/188258 | Zr-substituted BaTiO3 films | Jul 20, 2011 | Issued |
Array
(
[id] => 7719599
[patent_doc_number] => 20120008934
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-12
[patent_title] => 'CAMERA MODULE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/176918
[patent_app_country] => US
[patent_app_date] => 2011-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4240
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0008/20120008934.pdf
[firstpage_image] =>[orig_patent_app_number] => 13176918
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/176918 | CAMERA MODULE AND METHOD OF MANUFACTURING THE SAME | Jul 5, 2011 | Abandoned |