
Igwe U. Anya
Examiner (ID: 11819)
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891, 2825, 2829 |
| Total Applications | 1779 |
| Issued Applications | 1524 |
| Pending Applications | 97 |
| Abandoned Applications | 192 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 369852
[patent_doc_number] => 07476625
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-13
[patent_title] => 'Method for fabricating semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/241098
[patent_app_country] => US
[patent_app_date] => 2005-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4703
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/476/07476625.pdf
[firstpage_image] =>[orig_patent_app_number] => 11241098
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/241098 | Method for fabricating semiconductor device | Sep 28, 2005 | Issued |
Array
(
[id] => 195797
[patent_doc_number] => 07635599
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-22
[patent_title] => 'Three terminal magnetic sensing devices having base lead layers in-plane with collector substrate materials and methods of making the same'
[patent_app_type] => utility
[patent_app_number] => 11/239178
[patent_app_country] => US
[patent_app_date] => 2005-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 6268
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/635/07635599.pdf
[firstpage_image] =>[orig_patent_app_number] => 11239178
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/239178 | Three terminal magnetic sensing devices having base lead layers in-plane with collector substrate materials and methods of making the same | Sep 28, 2005 | Issued |
Array
(
[id] => 186063
[patent_doc_number] => 07646096
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-12
[patent_title] => 'Semiconductor device and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/235309
[patent_app_country] => US
[patent_app_date] => 2005-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 17
[patent_no_of_words] => 8839
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/646/07646096.pdf
[firstpage_image] =>[orig_patent_app_number] => 11235309
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/235309 | Semiconductor device and manufacturing method thereof | Sep 26, 2005 | Issued |
Array
(
[id] => 893029
[patent_doc_number] => 07345331
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-03-18
[patent_title] => 'Ferroelectric capacitor circuit for sensing hydrogen gas'
[patent_app_type] => utility
[patent_app_number] => 11/239459
[patent_app_country] => US
[patent_app_date] => 2005-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1943
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/345/07345331.pdf
[firstpage_image] =>[orig_patent_app_number] => 11239459
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/239459 | Ferroelectric capacitor circuit for sensing hydrogen gas | Sep 22, 2005 | Issued |
Array
(
[id] => 81647
[patent_doc_number] => 07745348
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-29
[patent_title] => 'Manufacturing method of a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/228419
[patent_app_country] => US
[patent_app_date] => 2005-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4284
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/745/07745348.pdf
[firstpage_image] =>[orig_patent_app_number] => 11228419
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/228419 | Manufacturing method of a semiconductor device | Sep 14, 2005 | Issued |
Array
(
[id] => 5865592
[patent_doc_number] => 20060099722
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-11
[patent_title] => 'Ferroelectric memory and its manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 11/226728
[patent_app_country] => US
[patent_app_date] => 2005-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5229
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0099/20060099722.pdf
[firstpage_image] =>[orig_patent_app_number] => 11226728
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/226728 | Ferroelectric memory and its manufacturing method | Sep 13, 2005 | Issued |
Array
(
[id] => 5708096
[patent_doc_number] => 20060049440
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-09
[patent_title] => 'Ferroelectric memory arrangement'
[patent_app_type] => utility
[patent_app_number] => 11/216678
[patent_app_country] => US
[patent_app_date] => 2005-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1723
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0049/20060049440.pdf
[firstpage_image] =>[orig_patent_app_number] => 11216678
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/216678 | Ferroelectric memory arrangement | Aug 30, 2005 | Issued |
Array
(
[id] => 5242446
[patent_doc_number] => 20070020941
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-25
[patent_title] => 'Plasma etching apparatus and particle removal method'
[patent_app_type] => utility
[patent_app_number] => 11/210728
[patent_app_country] => US
[patent_app_date] => 2005-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5074
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20070020941.pdf
[firstpage_image] =>[orig_patent_app_number] => 11210728
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/210728 | Plasma etching apparatus and particle removal method | Aug 24, 2005 | Abandoned |
Array
(
[id] => 826799
[patent_doc_number] => 07402463
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-22
[patent_title] => 'Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application'
[patent_app_type] => utility
[patent_app_number] => 11/207218
[patent_app_country] => US
[patent_app_date] => 2005-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 4170
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 329
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/402/07402463.pdf
[firstpage_image] =>[orig_patent_app_number] => 11207218
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/207218 | Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application | Aug 18, 2005 | Issued |
Array
(
[id] => 5903672
[patent_doc_number] => 20060046512
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Manufacturing method of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/206788
[patent_app_country] => US
[patent_app_date] => 2005-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 20312
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0046/20060046512.pdf
[firstpage_image] =>[orig_patent_app_number] => 11206788
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/206788 | Manufacturing method of semiconductor device | Aug 18, 2005 | Issued |
Array
(
[id] => 4997561
[patent_doc_number] => 20070040195
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-22
[patent_title] => 'Monolithic integrated passive and active electronic devices with biocompatible coatings'
[patent_app_type] => utility
[patent_app_number] => 11/207379
[patent_app_country] => US
[patent_app_date] => 2005-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2830
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0040/20070040195.pdf
[firstpage_image] =>[orig_patent_app_number] => 11207379
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/207379 | Monolithic integrated passive and active electronic devices with biocompatible coatings | Aug 18, 2005 | Abandoned |
Array
(
[id] => 668371
[patent_doc_number] => 07094611
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-08-22
[patent_title] => 'Method of producing ferroelectric capacitor'
[patent_app_type] => utility
[patent_app_number] => 11/205129
[patent_app_country] => US
[patent_app_date] => 2005-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 21
[patent_no_of_words] => 4624
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/094/07094611.pdf
[firstpage_image] =>[orig_patent_app_number] => 11205129
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/205129 | Method of producing ferroelectric capacitor | Aug 16, 2005 | Issued |
Array
(
[id] => 558144
[patent_doc_number] => 07470632
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-30
[patent_title] => 'Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge'
[patent_app_type] => utility
[patent_app_number] => 11/204509
[patent_app_country] => US
[patent_app_date] => 2005-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3668
[patent_no_of_claims] => 45
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/470/07470632.pdf
[firstpage_image] =>[orig_patent_app_number] => 11204509
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/204509 | Method of depositing a silicon dioxide comprising layer doped with at least one of P, B and Ge | Aug 15, 2005 | Issued |
Array
(
[id] => 422135
[patent_doc_number] => 07274067
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-09-25
[patent_title] => 'Service programmable logic arrays with low tunnel barrier interpoly insulators'
[patent_app_type] => utility
[patent_app_number] => 11/202460
[patent_app_country] => US
[patent_app_date] => 2005-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 21
[patent_no_of_words] => 13902
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/274/07274067.pdf
[firstpage_image] =>[orig_patent_app_number] => 11202460
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/202460 | Service programmable logic arrays with low tunnel barrier interpoly insulators | Aug 11, 2005 | Issued |
Array
(
[id] => 5765726
[patent_doc_number] => 20050263812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-01
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 11/202069
[patent_app_country] => US
[patent_app_date] => 2005-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 5906
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0263/20050263812.pdf
[firstpage_image] =>[orig_patent_app_number] => 11202069
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/202069 | Semiconductor memory device | Aug 11, 2005 | Issued |
Array
(
[id] => 568494
[patent_doc_number] => 07462560
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-09
[patent_title] => 'Process of physical vapor depositing mirror layer with improved reflectivity'
[patent_app_type] => utility
[patent_app_number] => 11/161649
[patent_app_country] => US
[patent_app_date] => 2005-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1724
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/462/07462560.pdf
[firstpage_image] =>[orig_patent_app_number] => 11161649
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/161649 | Process of physical vapor depositing mirror layer with improved reflectivity | Aug 10, 2005 | Issued |
Array
(
[id] => 5828363
[patent_doc_number] => 20060063380
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-23
[patent_title] => 'Salicide process and method of fabricating semiconductor device using the same'
[patent_app_type] => utility
[patent_app_number] => 11/199439
[patent_app_country] => US
[patent_app_date] => 2005-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4986
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0063/20060063380.pdf
[firstpage_image] =>[orig_patent_app_number] => 11199439
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/199439 | Methods of forming metal silicide layers by annealing metal layers using inert heat transferring gases established in a convection apparatus | Aug 7, 2005 | Issued |
Array
(
[id] => 4511021
[patent_doc_number] => 07915735
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-29
[patent_title] => 'Selective metal deposition over dielectric layers'
[patent_app_type] => utility
[patent_app_number] => 11/198208
[patent_app_country] => US
[patent_app_date] => 2005-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 4034
[patent_no_of_claims] => 64
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/915/07915735.pdf
[firstpage_image] =>[orig_patent_app_number] => 11198208
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/198208 | Selective metal deposition over dielectric layers | Aug 4, 2005 | Issued |
Array
(
[id] => 5796522
[patent_doc_number] => 20060033199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-16
[patent_title] => 'Electronic circuit device'
[patent_app_type] => utility
[patent_app_number] => 11/195818
[patent_app_country] => US
[patent_app_date] => 2005-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 11146
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0033/20060033199.pdf
[firstpage_image] =>[orig_patent_app_number] => 11195818
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/195818 | Electronic circuit device | Aug 2, 2005 | Issued |
Array
(
[id] => 5202332
[patent_doc_number] => 20070023811
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'VERTICAL P-N JUNCTION DEVICE AND METHOD OF FORMING SAME'
[patent_app_type] => utility
[patent_app_number] => 11/161239
[patent_app_country] => US
[patent_app_date] => 2005-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 3152
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0023/20070023811.pdf
[firstpage_image] =>[orig_patent_app_number] => 11161239
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/161239 | Method of forming a vertical P-N junction device | Jul 26, 2005 | Issued |