
Igwe U. Anya
Examiner (ID: 11819)
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891, 2825, 2829 |
| Total Applications | 1779 |
| Issued Applications | 1524 |
| Pending Applications | 97 |
| Abandoned Applications | 192 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 813640
[patent_doc_number] => 07413912
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[patent_kind] => B2
[patent_issue_date] => 2008-08-19
[patent_title] => 'Microsensor with ferroelectric material and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/126459
[patent_app_country] => US
[patent_app_date] => 2005-05-11
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[pdf_file] => patents/07/413/07413912.pdf
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Array
(
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[patent_doc_number] => 07267997
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[patent_issue_date] => 2007-09-11
[patent_title] => 'Process for forming magnetic memory structures'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/118828 | Process for forming magnetic memory structures | Apr 28, 2005 | Issued |
Array
(
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[patent_issue_date] => 2005-09-08
[patent_title] => 'Multi-bit MRAM device with switching nucleation sites'
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[patent_app_date] => 2005-04-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/112815 | Multi-bit MRAM device with switching nucleation sites | Apr 20, 2005 | Issued |
Array
(
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[patent_doc_number] => 07211866
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[patent_kind] => B2
[patent_issue_date] => 2007-05-01
[patent_title] => 'Scalable self-aligned dual floating gate memory cell array and methods of forming the array'
[patent_app_type] => utility
[patent_app_number] => 11/111129
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/111129 | Scalable self-aligned dual floating gate memory cell array and methods of forming the array | Apr 19, 2005 | Issued |
Array
(
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[patent_issue_date] => 2008-12-30
[patent_title] => 'Approach to reduce parasitic capacitance from dummy fill'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/107639 | Approach to reduce parasitic capacitance from dummy fill | Apr 13, 2005 | Issued |
Array
(
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[patent_title] => 'Large-area nanoenabled macroelectronic substrates and uses therefor'
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Array
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[patent_title] => 'Method for manufacturing thin film transistor'
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Array
(
[id] => 5903355
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[patent_issue_date] => 2006-03-02
[patent_title] => 'Method for manufacturing ferroelectric memory'
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[patent_app_number] => 11/102809
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Array
(
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[patent_doc_number] => 20050227496
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[patent_title] => 'Phase change memory elements and methods of fabricating phase change memory elements having a confined portion of phase change material on a recessed contact'
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Array
(
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[patent_doc_number] => 20060220251
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[patent_title] => 'Reducing internal film stress in dielectric film'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/096678 | Reducing internal film stress in dielectric film | Mar 30, 2005 | Abandoned |
Array
(
[id] => 7136948
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Array
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Array
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Array
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Array
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Array
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Array
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