
Igwe U. Anya
Examiner (ID: 11819)
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891, 2825, 2829 |
| Total Applications | 1779 |
| Issued Applications | 1524 |
| Pending Applications | 97 |
| Abandoned Applications | 192 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7204126
[patent_doc_number] => 20050042873
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-24
[patent_title] => 'Method and system to provide electroplanarization of a workpiece with a conducting material layer'
[patent_app_type] => utility
[patent_app_number] => 10/925358
[patent_app_country] => US
[patent_app_date] => 2004-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5385
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20050042873.pdf
[firstpage_image] =>[orig_patent_app_number] => 10925358
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/925358 | Method and system to provide electroplanarization of a workpiece with a conducting material layer | Aug 22, 2004 | Abandoned |
Array
(
[id] => 5796459
[patent_doc_number] => 20060033136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-16
[patent_title] => 'MRAM over sloped pillar'
[patent_app_type] => utility
[patent_app_number] => 10/917585
[patent_app_country] => US
[patent_app_date] => 2004-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6132
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0033/20060033136.pdf
[firstpage_image] =>[orig_patent_app_number] => 10917585
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/917585 | MRAM over sloped pillar | Aug 12, 2004 | Issued |
Array
(
[id] => 5800632
[patent_doc_number] => 20060035443
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-16
[patent_title] => 'PARTIAL WAFER BONDING AND DICING'
[patent_app_type] => utility
[patent_app_number] => 10/710880
[patent_app_country] => US
[patent_app_date] => 2004-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3800
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0035/20060035443.pdf
[firstpage_image] =>[orig_patent_app_number] => 10710880
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/710880 | Partial wafer bonding and dicing | Aug 9, 2004 | Issued |
Array
(
[id] => 737338
[patent_doc_number] => 07033939
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-04-25
[patent_title] => 'Chemistry for chemical vapor deposition of titanium containing films'
[patent_app_type] => utility
[patent_app_number] => 10/913556
[patent_app_country] => US
[patent_app_date] => 2004-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 4412
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/033/07033939.pdf
[firstpage_image] =>[orig_patent_app_number] => 10913556
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/913556 | Chemistry for chemical vapor deposition of titanium containing films | Aug 5, 2004 | Issued |
Array
(
[id] => 541403
[patent_doc_number] => 07169622
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-01-30
[patent_title] => 'Magnetoresistive random access memory devices and methods for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 10/912979
[patent_app_country] => US
[patent_app_date] => 2004-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 13
[patent_no_of_words] => 4720
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/169/07169622.pdf
[firstpage_image] =>[orig_patent_app_number] => 10912979
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/912979 | Magnetoresistive random access memory devices and methods for fabricating the same | Aug 4, 2004 | Issued |
Array
(
[id] => 7329065
[patent_doc_number] => 20040253836
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-16
[patent_title] => 'Low melting point alignment'
[patent_app_type] => new
[patent_app_number] => 10/483230
[patent_app_country] => US
[patent_app_date] => 2004-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 14298
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0253/20040253836.pdf
[firstpage_image] =>[orig_patent_app_number] => 10483230
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/483230 | Low melting point alignment | Aug 2, 2004 | Abandoned |
Array
(
[id] => 6926033
[patent_doc_number] => 20050239288
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-27
[patent_title] => 'Sequential reducing plasma and inert plasma pre-treatment method for oxidizable conductor layer'
[patent_app_type] => utility
[patent_app_number] => 10/910182
[patent_app_country] => US
[patent_app_date] => 2004-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4025
[patent_no_of_claims] => 51
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0239/20050239288.pdf
[firstpage_image] =>[orig_patent_app_number] => 10910182
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/910182 | Sequential reducing plasma and inert plasma pre-treatment method for oxidizable conductor layer | Aug 1, 2004 | Issued |
Array
(
[id] => 539513
[patent_doc_number] => 07176509
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-02-13
[patent_title] => 'Semiconductor device and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/902082
[patent_app_country] => US
[patent_app_date] => 2004-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 3835
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/176/07176509.pdf
[firstpage_image] =>[orig_patent_app_number] => 10902082
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/902082 | Semiconductor device and method for manufacturing the same | Jul 29, 2004 | Issued |
Array
(
[id] => 5820546
[patent_doc_number] => 20060024859
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-02
[patent_title] => 'Reverse printing'
[patent_app_type] => utility
[patent_app_number] => 10/909081
[patent_app_country] => US
[patent_app_date] => 2004-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2654
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0024/20060024859.pdf
[firstpage_image] =>[orig_patent_app_number] => 10909081
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/909081 | Reverse printing | Jul 29, 2004 | Issued |
Array
(
[id] => 7125194
[patent_doc_number] => 20050056938
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-17
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/901998
[patent_app_country] => US
[patent_app_date] => 2004-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6725
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0056/20050056938.pdf
[firstpage_image] =>[orig_patent_app_number] => 10901998
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/901998 | Semiconductor device | Jul 29, 2004 | Abandoned |
Array
(
[id] => 439193
[patent_doc_number] => 07259040
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-21
[patent_title] => 'Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array manufactured thereby'
[patent_app_type] => utility
[patent_app_number] => 10/902508
[patent_app_country] => US
[patent_app_date] => 2004-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 27
[patent_no_of_words] => 3799
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/259/07259040.pdf
[firstpage_image] =>[orig_patent_app_number] => 10902508
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/902508 | Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array manufactured thereby | Jul 28, 2004 | Issued |
Array
(
[id] => 627015
[patent_doc_number] => 07135398
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-14
[patent_title] => 'Reliable low-k interconnect structure with hybrid dielectric'
[patent_app_type] => utility
[patent_app_number] => 10/901868
[patent_app_country] => US
[patent_app_date] => 2004-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 5583
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/135/07135398.pdf
[firstpage_image] =>[orig_patent_app_number] => 10901868
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/901868 | Reliable low-k interconnect structure with hybrid dielectric | Jul 28, 2004 | Issued |
Array
(
[id] => 7058964
[patent_doc_number] => 20050001323
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-06
[patent_title] => 'Semiconductor device with dual damascene wiring'
[patent_app_type] => utility
[patent_app_number] => 10/898938
[patent_app_country] => US
[patent_app_date] => 2004-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 12496
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20050001323.pdf
[firstpage_image] =>[orig_patent_app_number] => 10898938
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/898938 | Semiconductor device with dual damascene wiring | Jul 26, 2004 | Issued |
Array
(
[id] => 5763241
[patent_doc_number] => 20060017180
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-26
[patent_title] => 'Alignment of MTJ stack to conductive lines in the absence of topography'
[patent_app_type] => utility
[patent_app_number] => 10/899253
[patent_app_country] => US
[patent_app_date] => 2004-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 8220
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0017/20060017180.pdf
[firstpage_image] =>[orig_patent_app_number] => 10899253
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/899253 | Alignment of MTJ stack to conductive lines in the absence of topography | Jul 25, 2004 | Issued |
Array
(
[id] => 7033771
[patent_doc_number] => 20050032281
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-10
[patent_title] => 'Imager photo diode capacitor structure with reduced process variation sensitivity'
[patent_app_type] => utility
[patent_app_number] => 10/897114
[patent_app_country] => US
[patent_app_date] => 2004-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3498
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0032/20050032281.pdf
[firstpage_image] =>[orig_patent_app_number] => 10897114
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/897114 | Imager photo diode capacitor structure with reduced process variation sensitivity | Jul 22, 2004 | Issued |
Array
(
[id] => 509073
[patent_doc_number] => 07199048
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-04-03
[patent_title] => 'Method for preventing metalorganic precursor penetration into porous dielectrics'
[patent_app_type] => utility
[patent_app_number] => 10/897479
[patent_app_country] => US
[patent_app_date] => 2004-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 24
[patent_no_of_words] => 5253
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/199/07199048.pdf
[firstpage_image] =>[orig_patent_app_number] => 10897479
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/897479 | Method for preventing metalorganic precursor penetration into porous dielectrics | Jul 22, 2004 | Issued |
Array
(
[id] => 7430035
[patent_doc_number] => 20040266176
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-30
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/895088
[patent_app_country] => US
[patent_app_date] => 2004-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 20616
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0266/20040266176.pdf
[firstpage_image] =>[orig_patent_app_number] => 10895088
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/895088 | Semiconductor device and method of manufacturing the same | Jul 20, 2004 | Issued |
Array
(
[id] => 7154562
[patent_doc_number] => 20050026316
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'EL device and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/891631
[patent_app_country] => US
[patent_app_date] => 2004-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3109
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0026/20050026316.pdf
[firstpage_image] =>[orig_patent_app_number] => 10891631
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/891631 | EL device and method for manufacturing the same | Jul 14, 2004 | Issued |
Array
(
[id] => 7025566
[patent_doc_number] => 20050019960
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-27
[patent_title] => 'Method and apparatus for forming a ferroelectric layer'
[patent_app_type] => utility
[patent_app_number] => 10/889035
[patent_app_country] => US
[patent_app_date] => 2004-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 6287
[patent_no_of_claims] => 51
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0019/20050019960.pdf
[firstpage_image] =>[orig_patent_app_number] => 10889035
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/889035 | Method and apparatus for forming a ferroelectric layer | Jul 12, 2004 | Abandoned |
Array
(
[id] => 7214584
[patent_doc_number] => 20050253266
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-11-17
[patent_title] => 'Semiconductor device and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/888518
[patent_app_country] => US
[patent_app_date] => 2004-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 11833
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0253/20050253266.pdf
[firstpage_image] =>[orig_patent_app_number] => 10888518
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/888518 | Semiconductor device and method for manufacturing the same | Jul 11, 2004 | Issued |