Search

Igwe U. Anya

Examiner (ID: 11819)

Most Active Art Unit
2891
Art Unit(s)
2891, 2825, 2829
Total Applications
1779
Issued Applications
1524
Pending Applications
97
Abandoned Applications
192

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7086661 [patent_doc_number] => 20050006773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/884998 [patent_app_country] => US [patent_app_date] => 2004-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10926 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20050006773.pdf [firstpage_image] =>[orig_patent_app_number] => 10884998 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/884998
Semiconductor device and method for fabricating the same Jul 6, 2004 Abandoned
Array ( [id] => 645168 [patent_doc_number] => 07118937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Fabrication method of thin-film transistor array with self-organized organic semiconductor' [patent_app_type] => utility [patent_app_number] => 10/882933 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 25 [patent_no_of_words] => 4824 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/118/07118937.pdf [firstpage_image] =>[orig_patent_app_number] => 10882933 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882933
Fabrication method of thin-film transistor array with self-organized organic semiconductor Jun 30, 2004 Issued
Array ( [id] => 5892621 [patent_doc_number] => 20060001158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Package stress management' [patent_app_type] => utility [patent_app_number] => 10/882783 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3651 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20060001158.pdf [firstpage_image] =>[orig_patent_app_number] => 10882783 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/882783
Package stress management Jun 29, 2004 Issued
Array ( [id] => 7405240 [patent_doc_number] => 20040262761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Metal thin film of semiconductor device and method for forming same' [patent_app_type] => new [patent_app_number] => 10/878286 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4363 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20040262761.pdf [firstpage_image] =>[orig_patent_app_number] => 10878286 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/878286
Metal thin film of semiconductor device and method for forming same Jun 28, 2004 Abandoned
Array ( [id] => 6978030 [patent_doc_number] => 20050287748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Reducing reactions between polysilicon gate electrodes and high dielectric constant gate dielectrics' [patent_app_type] => utility [patent_app_number] => 10/876400 [patent_app_country] => US [patent_app_date] => 2004-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4838 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20050287748.pdf [firstpage_image] =>[orig_patent_app_number] => 10876400 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/876400
Reducing reactions between polysilicon gate electrodes and high dielectric constant gate dielectrics Jun 23, 2004 Issued
Array ( [id] => 390265 [patent_doc_number] => 07300861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Method for interconnecting electronic components using a blend solution to form a conducting layer and an insulating layer' [patent_app_type] => utility [patent_app_number] => 10/875480 [patent_app_country] => US [patent_app_date] => 2004-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3448 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/300/07300861.pdf [firstpage_image] =>[orig_patent_app_number] => 10875480 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/875480
Method for interconnecting electronic components using a blend solution to form a conducting layer and an insulating layer Jun 23, 2004 Issued
Array ( [id] => 742983 [patent_doc_number] => 07030494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Semiconductor package having built-in micro electric mechanical system and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/874913 [patent_app_country] => US [patent_app_date] => 2004-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6214 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/030/07030494.pdf [firstpage_image] =>[orig_patent_app_number] => 10874913 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/874913
Semiconductor package having built-in micro electric mechanical system and manufacturing method thereof Jun 21, 2004 Issued
Array ( [id] => 505037 [patent_doc_number] => 07202185 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-04-10 [patent_title] => 'Silica thin films produced by rapid surface catalyzed vapor deposition (RVD) using a nucleation layer' [patent_app_type] => utility [patent_app_number] => 10/875158 [patent_app_country] => US [patent_app_date] => 2004-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4854 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/202/07202185.pdf [firstpage_image] =>[orig_patent_app_number] => 10875158 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/875158
Silica thin films produced by rapid surface catalyzed vapor deposition (RVD) using a nucleation layer Jun 21, 2004 Issued
Array ( [id] => 7154770 [patent_doc_number] => 20050026402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Method and device for depositing crystalline layers on crystalline substrates' [patent_app_type] => utility [patent_app_number] => 10/872920 [patent_app_country] => US [patent_app_date] => 2004-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3921 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20050026402.pdf [firstpage_image] =>[orig_patent_app_number] => 10872920 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/872920
Method and device for depositing crystalline layers on crystalline substrates Jun 20, 2004 Issued
Array ( [id] => 982255 [patent_doc_number] => 06927099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Process for producing semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/871290 [patent_app_country] => US [patent_app_date] => 2004-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5219 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927099.pdf [firstpage_image] =>[orig_patent_app_number] => 10871290 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/871290
Process for producing semiconductor device and semiconductor device Jun 16, 2004 Issued
Array ( [id] => 948839 [patent_doc_number] => 06962875 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-08 [patent_title] => 'Variable contact method and structure' [patent_app_type] => utility [patent_app_number] => 10/710000 [patent_app_country] => US [patent_app_date] => 2004-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 5462 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/962/06962875.pdf [firstpage_image] =>[orig_patent_app_number] => 10710000 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/710000
Variable contact method and structure Jun 10, 2004 Issued
Array ( [id] => 7329044 [patent_doc_number] => 20040253828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Fabrication method of semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/864638 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 30177 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20040253828.pdf [firstpage_image] =>[orig_patent_app_number] => 10864638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864638
Fabrication method of semiconductor integrated circuit device Jun 9, 2004 Abandoned
Array ( [id] => 637778 [patent_doc_number] => 07125742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-24 [patent_title] => 'Multi-passivation layer structure for organic thin-film transistors and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/863212 [patent_app_country] => US [patent_app_date] => 2004-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 3113 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/125/07125742.pdf [firstpage_image] =>[orig_patent_app_number] => 10863212 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/863212
Multi-passivation layer structure for organic thin-film transistors and method for fabricating the same Jun 8, 2004 Issued
Array ( [id] => 744767 [patent_doc_number] => 07026234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Parasitic capacitance-preventing dummy solder bump structure and method of making the same' [patent_app_type] => utility [patent_app_number] => 10/709940 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1697 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/026/07026234.pdf [firstpage_image] =>[orig_patent_app_number] => 10709940 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/709940
Parasitic capacitance-preventing dummy solder bump structure and method of making the same Jun 7, 2004 Issued
Array ( [id] => 7104050 [patent_doc_number] => 20050106776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Method of manufacturing organic electroluminescent display device and organic electroluminescent display device, and display device equipped with organic electroluminescent display device' [patent_app_type] => utility [patent_app_number] => 10/862189 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5957 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20050106776.pdf [firstpage_image] =>[orig_patent_app_number] => 10862189 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/862189
Method of manufacturing organic electroluminescent display device and organic electroluminescent display device, and display device equipped with organic electroluminescent display device Jun 3, 2004 Issued
Array ( [id] => 7230261 [patent_doc_number] => 20050255703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'DUAL DAMASCENE ETCHING PROCESS' [patent_app_type] => utility [patent_app_number] => 10/845160 [patent_app_country] => US [patent_app_date] => 2004-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 2998 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20050255703.pdf [firstpage_image] =>[orig_patent_app_number] => 10845160 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/845160
Dual damascene etching process May 13, 2004 Issued
Array ( [id] => 7220430 [patent_doc_number] => 20050254293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Novel structure/method to fabricate a high-performance magnetic tunneling junction MRAM' [patent_app_type] => utility [patent_app_number] => 10/844171 [patent_app_country] => US [patent_app_date] => 2004-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3550 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20050254293.pdf [firstpage_image] =>[orig_patent_app_number] => 10844171 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/844171
Structure/method to fabricate a high performance magnetic tunneling junction MRAM May 11, 2004 Issued
Array ( [id] => 686526 [patent_doc_number] => 07078242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Manufacturing method of semiconducter device' [patent_app_type] => utility [patent_app_number] => 10/835572 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 29 [patent_no_of_words] => 8905 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/078/07078242.pdf [firstpage_image] =>[orig_patent_app_number] => 10835572 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/835572
Manufacturing method of semiconducter device Apr 29, 2004 Issued
Array ( [id] => 677055 [patent_doc_number] => 07087950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Flash memory cell, flash memory device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/835390 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 5554 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/087/07087950.pdf [firstpage_image] =>[orig_patent_app_number] => 10835390 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/835390
Flash memory cell, flash memory device and manufacturing method thereof Apr 29, 2004 Issued
Array ( [id] => 288945 [patent_doc_number] => 07547558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-16 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/835311 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 53 [patent_no_of_words] => 7164 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/547/07547558.pdf [firstpage_image] =>[orig_patent_app_number] => 10835311 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/835311
Method for manufacturing semiconductor device Apr 29, 2004 Issued
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