Search

Ilwoo Park

Examiner (ID: 15959, Phone: (571)272-4155 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2185, 2782, 2182
Total Applications
945
Issued Applications
669
Pending Applications
39
Abandoned Applications
240

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16192751 [patent_doc_number] => 20200233600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => DATA MIGRATION [patent_app_type] => utility [patent_app_number] => 16/721553 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16721553 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/721553
Data migration Dec 18, 2019 Issued
Array ( [id] => 18401366 [patent_doc_number] => 11663504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Method and system for predicting resource reallocation in a resource pool [patent_app_type] => utility [patent_app_number] => 16/671539 [patent_app_country] => US [patent_app_date] => 2019-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9022 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671539 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/671539
Method and system for predicting resource reallocation in a resource pool Oct 31, 2019 Issued
Array ( [id] => 15772709 [patent_doc_number] => 20200117372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => AVAILABLE STORAGE SPACE IN A SYSTEM WITH VARYING DATA REDUNDANCY SCHEMES [patent_app_type] => utility [patent_app_number] => 16/601978 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601978 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601978
Available storage space in a system with varying data redundancy schemes Oct 14, 2019 Issued
Array ( [id] => 18463154 [patent_doc_number] => 11687444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Data managing method. memory controlling circuit unit and memory storage device [patent_app_type] => utility [patent_app_number] => 16/600568 [patent_app_country] => US [patent_app_date] => 2019-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 9082 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600568 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600568
Data managing method. memory controlling circuit unit and memory storage device Oct 13, 2019 Issued
Array ( [id] => 18720110 [patent_doc_number] => 11797455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Cache management based on reuse distance [patent_app_type] => utility [patent_app_number] => 16/600897 [patent_app_country] => US [patent_app_date] => 2019-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6583 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600897 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600897
Cache management based on reuse distance Oct 13, 2019 Issued
Array ( [id] => 17636921 [patent_doc_number] => 11347645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Lifetime adaptive efficient pre-fetching on a storage system [patent_app_type] => utility [patent_app_number] => 16/601446 [patent_app_country] => US [patent_app_date] => 2019-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 15025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601446 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601446
Lifetime adaptive efficient pre-fetching on a storage system Oct 13, 2019 Issued
Array ( [id] => 18386000 [patent_doc_number] => 11656781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Distributing sequential read streams across synchronous mirror pairs [patent_app_type] => utility [patent_app_number] => 16/599254 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7074 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16599254 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/599254
Distributing sequential read streams across synchronous mirror pairs Oct 10, 2019 Issued
Array ( [id] => 16764077 [patent_doc_number] => 20210109658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => HOST DEVICE WITH MULTI-PATH LAYER PROVIDING DYNAMIC CONTROL OF ONE OR MORE PATH SELECTION ALGORITHMS [patent_app_type] => utility [patent_app_number] => 16/599235 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16599235 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/599235
Host device with multi-path layer providing dynamic control of one or more path selection algorithms Oct 10, 2019 Issued
Array ( [id] => 15367515 [patent_doc_number] => 20200019522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => INTEGRATED COMPONENT INTERCONNECT [patent_app_type] => utility [patent_app_number] => 16/579481 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16579481 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/579481
INTEGRATED COMPONENT INTERCONNECT Sep 22, 2019 Abandoned
Array ( [id] => 16675730 [patent_doc_number] => 20210064496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => CONFIGURATION OF KEY-MAPPING [patent_app_type] => utility [patent_app_number] => 16/558400 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10863 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558400 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558400
Configuration of key-mapping Sep 2, 2019 Issued
Array ( [id] => 16393237 [patent_doc_number] => 20200334178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => PROCESSING SYSTEM WITH ROUND-ROBIN MECHANISM AND ITS MEMORY ACCESS METHOD [patent_app_type] => utility [patent_app_number] => 16/558618 [patent_app_country] => US [patent_app_date] => 2019-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558618 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/558618
Processing system with round-robin mechanism and its memory access method Sep 2, 2019 Issued
Array ( [id] => 16330893 [patent_doc_number] => 20200301859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => MEMORY SYSTEM FOR RECEIVING COMMUNICATION INFORMATION FROM EXTERNAL DEVICE VIA VIRTUAL CHANNELS AND CONTROL METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/557371 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5059 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557371 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557371
Memory system for receiving communication information from external device via virtual channels and control method of memory system Aug 29, 2019 Issued
Array ( [id] => 15594605 [patent_doc_number] => 20200073837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => BRIDGE DEVICE, METHOD FOR CONTROLLING BRIDGE DEVICE, AND INFORMATION PROCESSING APPARATUS INCLUDING BRIDGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/542741 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542741 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542741
BRIDGE DEVICE, METHOD FOR CONTROLLING BRIDGE DEVICE, AND INFORMATION PROCESSING APPARATUS INCLUDING BRIDGE DEVICE Aug 15, 2019 Abandoned
Array ( [id] => 15530875 [patent_doc_number] => 20200057743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-20 [patent_title] => NETWORK INPUT/OUTPUT STRUCTURE OF ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/543067 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543067 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543067
NETWORK INPUT/OUTPUT STRUCTURE OF ELECTRONIC DEVICE Aug 15, 2019 Abandoned
Array ( [id] => 15594073 [patent_doc_number] => 20200073571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => MEMORY CONTROLLER AND ASSOCIATED ACCESSING METHOD [patent_app_type] => utility [patent_app_number] => 16/520514 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16520514 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/520514
MEMORY CONTROLLER AND ASSOCIATED ACCESSING METHOD Jul 23, 2019 Abandoned
Array ( [id] => 17269291 [patent_doc_number] => 11194718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Instruction cache coherence [patent_app_type] => utility [patent_app_number] => 16/520657 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5451 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16520657 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/520657
Instruction cache coherence Jul 23, 2019 Issued
Array ( [id] => 15594575 [patent_doc_number] => 20200073822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => Security Configuration for Memory Address Translation from Object Specific Virtual Address Spaces to a Physical Address Space [patent_app_type] => utility [patent_app_number] => 16/520311 [patent_app_country] => US [patent_app_date] => 2019-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16520311 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/520311
Security Configuration for Memory Address Translation from Object Specific Virtual Address Spaces to a Physical Address Space Jul 22, 2019 Abandoned
Array ( [id] => 16408638 [patent_doc_number] => 10817190 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-27 [patent_title] => System and method for managing memory compression security [patent_app_type] => utility [patent_app_number] => 16/511699 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10081 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16511699 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/511699
System and method for managing memory compression security Jul 14, 2019 Issued
Array ( [id] => 17282963 [patent_doc_number] => 11199992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Automatic host buffer pointer pattern detection [patent_app_type] => utility [patent_app_number] => 16/512312 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4483 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16512312 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/512312
Automatic host buffer pointer pattern detection Jul 14, 2019 Issued
Array ( [id] => 15043101 [patent_doc_number] => 20190332555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => COMMAND PACKETS FOR THE DIRECT CONTROL OF NON-VOLATILE MEMORY CHANNELS WITHIN A SOLID STATE DRIVE [patent_app_type] => utility [patent_app_number] => 16/508155 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16508155 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/508155
Command packets for the direct control of non-volatile memory channels within a solid state drive Jul 9, 2019 Issued
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