![](/images/general/no_picture/200_user.png)
Irina Kalish
Examiner (ID: 10416)
Most Active Art Unit | 1714 |
Art Unit(s) | 1714 |
Total Applications | 6 |
Issued Applications | 3 |
Pending Applications | 0 |
Abandoned Applications | 3 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9980629
[patent_doc_number] => 09026959
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-05-05
[patent_title] => 'Method and device for increasing fin device density for unaligned fins'
[patent_app_type] => utility
[patent_app_number] => 14/334195
[patent_app_country] => US
[patent_app_date] => 2014-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5683
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334195
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/334195 | Method and device for increasing fin device density for unaligned fins | Jul 16, 2014 | Issued |
Array
(
[id] => 16551176
[patent_doc_number] => 10884333
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-05
[patent_title] => Method of designing lithography features by self-assembly of block copolymer
[patent_app_type] => utility
[patent_app_number] => 14/909057
[patent_app_country] => US
[patent_app_date] => 2014-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 22
[patent_no_of_words] => 15250
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14909057
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/909057 | Method of designing lithography features by self-assembly of block copolymer | Jul 8, 2014 | Issued |
Array
(
[id] => 13029551
[patent_doc_number] => 10037397
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-31
[patent_title] => Memory cell including vertical transistors and horizontal nanowire bit lines
[patent_app_type] => utility
[patent_app_number] => 14/312040
[patent_app_country] => US
[patent_app_date] => 2014-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 50
[patent_no_of_words] => 21421
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14312040
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/312040 | Memory cell including vertical transistors and horizontal nanowire bit lines | Jun 22, 2014 | Issued |
Array
(
[id] => 10485929
[patent_doc_number] => 20150370948
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-24
[patent_title] => 'MEMORY CELLS HAVING TRANSISTORS WITH DIFFERENT NUMBERS OF NANOWIRES OR 2D MATERIAL STRIPS'
[patent_app_type] => utility
[patent_app_number] => 14/312141
[patent_app_country] => US
[patent_app_date] => 2014-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 22356
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14312141
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/312141 | MEMORY CELLS HAVING TRANSISTORS WITH DIFFERENT NUMBERS OF NANOWIRES OR 2D MATERIAL STRIPS | Jun 22, 2014 | Abandoned |
Array
(
[id] => 10478517
[patent_doc_number] => 20150363534
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'METHOD AND APPARATUS FOR POST-OPC VERIFICATION'
[patent_app_type] => utility
[patent_app_number] => 14/301338
[patent_app_country] => US
[patent_app_date] => 2014-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2351
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14301338
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/301338 | METHOD AND APPARATUS FOR POST-OPC VERIFICATION | Jun 10, 2014 | Abandoned |
Array
(
[id] => 10771280
[patent_doc_number] => 20160117436
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-04-28
[patent_title] => 'SYSTEM AND METHOD FOR DESIGNING AN INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 14/898976
[patent_app_country] => US
[patent_app_date] => 2014-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9499
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14898976
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/898976 | SYSTEM AND METHOD FOR DESIGNING AN INTEGRATED CIRCUIT | May 22, 2014 | Abandoned |
Array
(
[id] => 9800959
[patent_doc_number] => 20150012903
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-01-08
[patent_title] => 'NON-INTRUSIVE MONITORING AND CONTROL OF INTEGRATED CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 14/281248
[patent_app_country] => US
[patent_app_date] => 2014-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 39
[patent_figures_cnt] => 39
[patent_no_of_words] => 23609
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14281248
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/281248 | NON-INTRUSIVE MONITORING AND CONTROL OF INTEGRATED CIRCUITS | May 18, 2014 | Abandoned |
Array
(
[id] => 10794130
[patent_doc_number] => 20160140287
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-19
[patent_title] => 'Template Creation Device for Sample Observation Device, and Sample Observation Device'
[patent_app_type] => utility
[patent_app_number] => 14/898229
[patent_app_country] => US
[patent_app_date] => 2014-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 9293
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14898229
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/898229 | Template Creation Device for Sample Observation Device, and Sample Observation Device | May 18, 2014 | Abandoned |
Array
(
[id] => 10439499
[patent_doc_number] => 20150324511
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-12
[patent_title] => 'FLOATING METAL FILL CAPACITANCE CALCULATION'
[patent_app_type] => utility
[patent_app_number] => 14/274670
[patent_app_country] => US
[patent_app_date] => 2014-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8046
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14274670
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/274670 | FLOATING METAL FILL CAPACITANCE CALCULATION | May 8, 2014 | Abandoned |
Array
(
[id] => 11806667
[patent_doc_number] => 09547738
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-01-17
[patent_title] => 'Invariant code optimization in high-level FPGA synthesis'
[patent_app_type] => utility
[patent_app_number] => 14/273295
[patent_app_country] => US
[patent_app_date] => 2014-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4905
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14273295
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/273295 | Invariant code optimization in high-level FPGA synthesis | May 7, 2014 | Issued |
Array
(
[id] => 9912416
[patent_doc_number] => 20150067619
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-03-05
[patent_title] => 'ADVANCED CORRECTION METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/272077
[patent_app_country] => US
[patent_app_date] => 2014-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6628
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14272077
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/272077 | ADVANCED CORRECTION METHOD | May 6, 2014 | Abandoned |
Array
(
[id] => 11287229
[patent_doc_number] => 09503093
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-22
[patent_title] => 'Virtualization of programmable integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 14/260580
[patent_app_country] => US
[patent_app_date] => 2014-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4148
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14260580
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/260580 | Virtualization of programmable integrated circuits | Apr 23, 2014 | Issued |
Array
(
[id] => 11207161
[patent_doc_number] => 09436788
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-09-06
[patent_title] => 'Method of fabricating an integrated circuit with block dummy for optimized pattern density uniformity'
[patent_app_type] => utility
[patent_app_number] => 14/253282
[patent_app_country] => US
[patent_app_date] => 2014-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 5714
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14253282
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/253282 | Method of fabricating an integrated circuit with block dummy for optimized pattern density uniformity | Apr 14, 2014 | Issued |
Array
(
[id] => 10252747
[patent_doc_number] => 20150137743
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'WIRELESS CHARGING SYSTEM AND WIRELESS CHARGING METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/249355
[patent_app_country] => US
[patent_app_date] => 2014-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3384
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14249355
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/249355 | WIRELESS CHARGING SYSTEM AND WIRELESS CHARGING METHOD | Apr 9, 2014 | Abandoned |
Array
(
[id] => 10410412
[patent_doc_number] => 20150295421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-15
[patent_title] => 'ACTIVE ISOLATED CIRCUIT FOR PRECHARGING AND DISCHARGING A HIGH VOLTAGE BUS'
[patent_app_type] => utility
[patent_app_number] => 14/250231
[patent_app_country] => US
[patent_app_date] => 2014-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3704
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14250231
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/250231 | ACTIVE ISOLATED CIRCUIT FOR PRECHARGING AND DISCHARGING A HIGH VOLTAGE BUS | Apr 9, 2014 | Abandoned |
Array
(
[id] => 10903653
[patent_doc_number] => 20140306666
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-16
[patent_title] => 'Apparatus and Method for Battery Balancing'
[patent_app_type] => utility
[patent_app_number] => 14/248864
[patent_app_country] => US
[patent_app_date] => 2014-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4311
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14248864
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/248864 | Apparatus and Method for Battery Balancing | Apr 8, 2014 | Abandoned |
Array
(
[id] => 9639854
[patent_doc_number] => 20140217964
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-07
[patent_title] => 'POWER CONVERSION EQUIPMENT'
[patent_app_type] => utility
[patent_app_number] => 14/247802
[patent_app_country] => US
[patent_app_date] => 2014-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 2843
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14247802
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/247802 | POWER CONVERSION EQUIPMENT | Apr 7, 2014 | Abandoned |
Array
(
[id] => 11494579
[patent_doc_number] => 20170068764
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-09
[patent_title] => 'CIRCUIT DESIGN DEVICE AND CIRCUIT DESIGN PROGRAM'
[patent_app_type] => utility
[patent_app_number] => 15/122758
[patent_app_country] => US
[patent_app_date] => 2014-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 9274
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15122758
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/122758 | CIRCUIT DESIGN DEVICE AND CIRCUIT DESIGN PROGRAM | Apr 6, 2014 | Abandoned |
Array
(
[id] => 10909823
[patent_doc_number] => 20140312839
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-23
[patent_title] => 'SYSTEM AND METHOD FOR ELECTRIC VEHICLE CHARGING ANALYSIS AND FEEDBACK'
[patent_app_type] => utility
[patent_app_number] => 14/246538
[patent_app_country] => US
[patent_app_date] => 2014-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7206
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14246538
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/246538 | SYSTEM AND METHOD FOR ELECTRIC VEHICLE CHARGING ANALYSIS AND FEEDBACK | Apr 6, 2014 | Abandoned |
Array
(
[id] => 9758988
[patent_doc_number] => 20140289690
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-25
[patent_title] => 'ON-CHIP-VARIATION (OCV) AND TIMING-CRITICALITY AWARE CLOCK TREE SYNTHESIS (CTS)'
[patent_app_type] => utility
[patent_app_number] => 14/221185
[patent_app_country] => US
[patent_app_date] => 2014-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5732
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14221185
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/221185 | ON-CHIP-VARIATION (OCV) AND TIMING-CRITICALITY AWARE CLOCK TREE SYNTHESIS (CTS) | Mar 19, 2014 | Abandoned |